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| author | Tejal Kudav <tkudav@nvidia.com> | 2017-07-28 02:50:52 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-27 06:08:05 -0400 |
| commit | 20b746b485be79abd0b9d1aedc8fb9cd741e5183 (patch) | |
| tree | 52b5fd2f09f39e4287f86a254837c3668b9ec992 /drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |
| parent | 84741589d691246a404928e3070e229a87e3f835 (diff) | |
gpu: nvgpu: Selectively disable/enable CFC
clk_pmu_freq_controller_load used the default mask and affected
all the clock frequency controllers (CFC) which had their bits
set in the mask. We wish to enable/disable the CFCs in isolation
through debugfs. So we add a parameter(bit_idx) to the function
which will help affect only one CFC at a time
JIRA DNVGPU-207
DEPENDS ON: <http://git-master/r/1563302>
Change-Id: I233f52158b4a987bcc058a425380983dbe53fac8
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1563303
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
0 files changed, 0 insertions, 0 deletions