diff options
author | Vinod G <vinodg@nvidia.com> | 2018-06-11 23:11:43 -0400 |
---|---|---|
committer | Tejal Kudav <tkudav@nvidia.com> | 2018-06-14 09:44:08 -0400 |
commit | 0aa8d6e27394ec15c1816943996daf8f8ffab438 (patch) | |
tree | f4cc5406bfe6a2f39a3871bb680286ee66925130 /drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |
parent | 12637d9c23227647e5e62a907974afc987c773a4 (diff) |
gpu: nvgpu: Mask an unused HCE_ILLEGAL_OP Interrupt
HCE interrupt is not being used in nvgpu platform now,
masking the bit from the interrupt register.
bug 2082123
Change-Id: I1d53584afebe57b9621c8f4ec395cd1dcd6c7611
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1746850
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/fifo_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c index 997856aa..00119300 100644 --- a/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/fifo_gk20a.c | |||
@@ -834,11 +834,14 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g) | |||
834 | gk20a_writel(g, pbdma_intr_stall_r(i), intr_stall); | 834 | gk20a_writel(g, pbdma_intr_stall_r(i), intr_stall); |
835 | nvgpu_log_info(g, "pbdma id:%u, intr_en_0 0x%08x", i, intr_stall); | 835 | nvgpu_log_info(g, "pbdma id:%u, intr_en_0 0x%08x", i, intr_stall); |
836 | gk20a_writel(g, pbdma_intr_en_0_r(i), intr_stall); | 836 | gk20a_writel(g, pbdma_intr_en_0_r(i), intr_stall); |
837 | 837 | intr_stall = gk20a_readl(g, pbdma_intr_stall_1_r(i)); | |
838 | nvgpu_log_info(g, "pbdma id:%u, intr_en_1 0x%08x", i, | 838 | /* |
839 | ~pbdma_intr_en_0_lbreq_enabled_f()); | 839 | * For bug 2082123 |
840 | gk20a_writel(g, pbdma_intr_en_1_r(i), | 840 | * Mask the unused HCE_RE_ILLEGAL_OP bit from the interrupt. |
841 | ~pbdma_intr_en_0_lbreq_enabled_f()); | 841 | */ |
842 | intr_stall &= ~pbdma_intr_stall_1_hce_illegal_op_enabled_f(); | ||
843 | nvgpu_log_info(g, "pbdma id:%u, intr_en_1 0x%08x", i, intr_stall); | ||
844 | gk20a_writel(g, pbdma_intr_en_1_r(i), intr_stall); | ||
842 | } | 845 | } |
843 | 846 | ||
844 | /* reset runlist interrupts */ | 847 | /* reset runlist interrupts */ |