diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2018-09-12 17:51:40 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-27 18:05:25 -0400 |
commit | e3ae03e17abd452c157545234348692364b4b9f6 (patch) | |
tree | 121b3dcde56c87f9a1008ad4f5effbeb69cff945 /drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |
parent | 78e3d22da3c2513d425c8c2560468ce854a982dd (diff) |
gpu: nvgpu: Add MC APIs for reset masks
Add API for querying reset mask corresponding to a unit. The reset
masks need to be read from MC HW header, and we do not want all
units to access Mc HW headers themselves.
JIRA NVGPU-954
Change-Id: I49ebbd891569de634bfc71afcecc8cd2358805c0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1823384
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index ef505425..adc13c3d 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <nvgpu/io.h> | 31 | #include <nvgpu/io.h> |
32 | #include <nvgpu/utils.h> | 32 | #include <nvgpu/utils.h> |
33 | #include <nvgpu/channel.h> | 33 | #include <nvgpu/channel.h> |
34 | #include <nvgpu/unit.h> | ||
34 | 35 | ||
35 | #include "gk20a.h" | 36 | #include "gk20a.h" |
36 | #include "gr_gk20a.h" | 37 | #include "gr_gk20a.h" |
@@ -39,14 +40,13 @@ | |||
39 | 40 | ||
40 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> | 41 | #include <nvgpu/hw/gk20a/hw_gr_gk20a.h> |
41 | #include <nvgpu/hw/gk20a/hw_perf_gk20a.h> | 42 | #include <nvgpu/hw/gk20a/hw_perf_gk20a.h> |
42 | #include <nvgpu/hw/gk20a/hw_mc_gk20a.h> | ||
43 | 43 | ||
44 | static void gk20a_perfbuf_reset_streaming(struct gk20a *g) | 44 | static void gk20a_perfbuf_reset_streaming(struct gk20a *g) |
45 | { | 45 | { |
46 | u32 engine_status; | 46 | u32 engine_status; |
47 | u32 num_unread_bytes; | 47 | u32 num_unread_bytes; |
48 | 48 | ||
49 | g->ops.mc.reset(g, mc_enable_perfmon_enabled_f()); | 49 | g->ops.mc.reset(g, g->ops.mc.reset_mask(g, NVGPU_UNIT_PERFMON)); |
50 | 50 | ||
51 | engine_status = gk20a_readl(g, perf_pmasys_enginestatus_r()); | 51 | engine_status = gk20a_readl(g, perf_pmasys_enginestatus_r()); |
52 | WARN_ON(0u == | 52 | WARN_ON(0u == |