diff options
author | David Nieto <dmartineznie@nvidia.com> | 2017-03-13 23:23:03 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-03-25 05:06:55 -0400 |
commit | e0f2afe5eb43fb32490ccabd504879c3e3e54623 (patch) | |
tree | d227311914fd44e88e1ab13b652870c0fa772cf1 /drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |
parent | b48186488d0108dee7b3fb755b2d99f4652780df (diff) |
gpu: nvgpu: refactor teardown to support unbind
This change refactors the teardown in remove to ensure that it is
possible to unload the driver while leaving fds open. This is achieved
by making sure that the SW state is kept alive till all fds are closed
and by checking that subsequent calls to ioctls after the teardown fail.
Normally, this would be achieved ny calls into gk20a_busy(), but in
kickoff we dont call into that to reduce latency, so we need to check
the driver status directly, and also in some of the functions
as we need to make sure the ioctl does not dereference the device or
platform struct
bug 200277762
JIRA: EVLR-1023
Change-Id: I163e47a08c29d4d5b3ab79f0eb531ef234f40bde
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1320219
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index db534318..165bcf46 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
@@ -665,7 +665,7 @@ static int nvgpu_dbg_gpu_ioctl_timeout(struct dbg_session_gk20a *dbg_s, | |||
665 | struct nvgpu_dbg_gpu_timeout_args *args) | 665 | struct nvgpu_dbg_gpu_timeout_args *args) |
666 | { | 666 | { |
667 | int err; | 667 | int err; |
668 | struct gk20a *g = get_gk20a(dbg_s->dev); | 668 | struct gk20a *g = dbg_s->g; |
669 | 669 | ||
670 | gk20a_dbg_fn("powergate mode = %d", args->enable); | 670 | gk20a_dbg_fn("powergate mode = %d", args->enable); |
671 | 671 | ||
@@ -680,7 +680,7 @@ static void nvgpu_dbg_gpu_ioctl_get_timeout(struct dbg_session_gk20a *dbg_s, | |||
680 | struct nvgpu_dbg_gpu_timeout_args *args) | 680 | struct nvgpu_dbg_gpu_timeout_args *args) |
681 | { | 681 | { |
682 | int status; | 682 | int status; |
683 | struct gk20a *g = get_gk20a(dbg_s->dev); | 683 | struct gk20a *g = dbg_s->g; |
684 | 684 | ||
685 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); | 685 | nvgpu_mutex_acquire(&g->dbg_sessions_lock); |
686 | status = g->timeouts_enabled; | 686 | status = g->timeouts_enabled; |
@@ -711,7 +711,7 @@ static int nvgpu_dbg_gpu_ioctl_read_single_sm_error_state( | |||
711 | struct dbg_session_gk20a *dbg_s, | 711 | struct dbg_session_gk20a *dbg_s, |
712 | struct nvgpu_dbg_gpu_read_single_sm_error_state_args *args) | 712 | struct nvgpu_dbg_gpu_read_single_sm_error_state_args *args) |
713 | { | 713 | { |
714 | struct gk20a *g = get_gk20a(dbg_s->dev); | 714 | struct gk20a *g = dbg_s->g; |
715 | struct gr_gk20a *gr = &g->gr; | 715 | struct gr_gk20a *gr = &g->gr; |
716 | struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_state; | 716 | struct nvgpu_dbg_gpu_sm_error_state_record *sm_error_state; |
717 | u32 sm_id; | 717 | u32 sm_id; |
@@ -750,7 +750,7 @@ static int nvgpu_dbg_gpu_ioctl_clear_single_sm_error_state( | |||
750 | struct dbg_session_gk20a *dbg_s, | 750 | struct dbg_session_gk20a *dbg_s, |
751 | struct nvgpu_dbg_gpu_clear_single_sm_error_state_args *args) | 751 | struct nvgpu_dbg_gpu_clear_single_sm_error_state_args *args) |
752 | { | 752 | { |
753 | struct gk20a *g = get_gk20a(dbg_s->dev); | 753 | struct gk20a *g = dbg_s->g; |
754 | struct gr_gk20a *gr = &g->gr; | 754 | struct gr_gk20a *gr = &g->gr; |
755 | u32 sm_id; | 755 | u32 sm_id; |
756 | struct channel_gk20a *ch; | 756 | struct channel_gk20a *ch; |
@@ -781,7 +781,7 @@ static int nvgpu_dbg_gpu_ioctl_write_single_sm_error_state( | |||
781 | struct dbg_session_gk20a *dbg_s, | 781 | struct dbg_session_gk20a *dbg_s, |
782 | struct nvgpu_dbg_gpu_write_single_sm_error_state_args *args) | 782 | struct nvgpu_dbg_gpu_write_single_sm_error_state_args *args) |
783 | { | 783 | { |
784 | struct gk20a *g = get_gk20a(dbg_s->dev); | 784 | struct gk20a *g = dbg_s->g; |
785 | struct gr_gk20a *gr = &g->gr; | 785 | struct gr_gk20a *gr = &g->gr; |
786 | u32 sm_id; | 786 | u32 sm_id; |
787 | struct channel_gk20a *ch; | 787 | struct channel_gk20a *ch; |
@@ -952,7 +952,7 @@ long gk20a_dbg_gpu_dev_ioctl(struct file *filp, unsigned int cmd, | |||
952 | unsigned long arg) | 952 | unsigned long arg) |
953 | { | 953 | { |
954 | struct dbg_session_gk20a *dbg_s = filp->private_data; | 954 | struct dbg_session_gk20a *dbg_s = filp->private_data; |
955 | struct gk20a *g = get_gk20a(dbg_s->dev); | 955 | struct gk20a *g = dbg_s->g; |
956 | u8 buf[NVGPU_DBG_GPU_IOCTL_MAX_ARG_SIZE]; | 956 | u8 buf[NVGPU_DBG_GPU_IOCTL_MAX_ARG_SIZE]; |
957 | int err = 0; | 957 | int err = 0; |
958 | 958 | ||
@@ -1141,7 +1141,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s, | |||
1141 | bool is_pg_disabled = false; | 1141 | bool is_pg_disabled = false; |
1142 | 1142 | ||
1143 | struct device *dev = dbg_s->dev; | 1143 | struct device *dev = dbg_s->dev; |
1144 | struct gk20a *g = get_gk20a(dbg_s->dev); | 1144 | struct gk20a *g = dbg_s->g; |
1145 | struct channel_gk20a *ch; | 1145 | struct channel_gk20a *ch; |
1146 | 1146 | ||
1147 | gk20a_dbg_fn("%d ops, max fragment %d", args->num_ops, g->dbg_regops_tmp_buf_ops); | 1147 | gk20a_dbg_fn("%d ops, max fragment %d", args->num_ops, g->dbg_regops_tmp_buf_ops); |
@@ -1257,7 +1257,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s, | |||
1257 | static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode) | 1257 | static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode) |
1258 | { | 1258 | { |
1259 | int err = 0; | 1259 | int err = 0; |
1260 | struct gk20a *g = get_gk20a(dbg_s->dev); | 1260 | struct gk20a *g = dbg_s->g; |
1261 | 1261 | ||
1262 | /* This function must be called with g->dbg_sessions_lock held */ | 1262 | /* This function must be called with g->dbg_sessions_lock held */ |
1263 | 1263 | ||
@@ -1360,7 +1360,7 @@ static int nvgpu_ioctl_powergate_gk20a(struct dbg_session_gk20a *dbg_s, | |||
1360 | struct nvgpu_dbg_gpu_powergate_args *args) | 1360 | struct nvgpu_dbg_gpu_powergate_args *args) |
1361 | { | 1361 | { |
1362 | int err; | 1362 | int err; |
1363 | struct gk20a *g = get_gk20a(dbg_s->dev); | 1363 | struct gk20a *g = dbg_s->g; |
1364 | gk20a_dbg_fn("%s powergate mode = %d", | 1364 | gk20a_dbg_fn("%s powergate mode = %d", |
1365 | dev_name(dbg_s->dev), args->mode); | 1365 | dev_name(dbg_s->dev), args->mode); |
1366 | 1366 | ||
@@ -1374,7 +1374,7 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s, | |||
1374 | struct nvgpu_dbg_gpu_smpc_ctxsw_mode_args *args) | 1374 | struct nvgpu_dbg_gpu_smpc_ctxsw_mode_args *args) |
1375 | { | 1375 | { |
1376 | int err; | 1376 | int err; |
1377 | struct gk20a *g = get_gk20a(dbg_s->dev); | 1377 | struct gk20a *g = dbg_s->g; |
1378 | struct channel_gk20a *ch_gk20a; | 1378 | struct channel_gk20a *ch_gk20a; |
1379 | 1379 | ||
1380 | gk20a_dbg_fn("%s smpc ctxsw mode = %d", | 1380 | gk20a_dbg_fn("%s smpc ctxsw mode = %d", |
@@ -1416,7 +1416,7 @@ static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s, | |||
1416 | struct nvgpu_dbg_gpu_hwpm_ctxsw_mode_args *args) | 1416 | struct nvgpu_dbg_gpu_hwpm_ctxsw_mode_args *args) |
1417 | { | 1417 | { |
1418 | int err; | 1418 | int err; |
1419 | struct gk20a *g = get_gk20a(dbg_s->dev); | 1419 | struct gk20a *g = dbg_s->g; |
1420 | struct channel_gk20a *ch_gk20a; | 1420 | struct channel_gk20a *ch_gk20a; |
1421 | 1421 | ||
1422 | gk20a_dbg_fn("%s pm ctxsw mode = %d", | 1422 | gk20a_dbg_fn("%s pm ctxsw mode = %d", |
@@ -1468,7 +1468,7 @@ static int nvgpu_dbg_gpu_ioctl_suspend_resume_sm( | |||
1468 | struct dbg_session_gk20a *dbg_s, | 1468 | struct dbg_session_gk20a *dbg_s, |
1469 | struct nvgpu_dbg_gpu_suspend_resume_all_sms_args *args) | 1469 | struct nvgpu_dbg_gpu_suspend_resume_all_sms_args *args) |
1470 | { | 1470 | { |
1471 | struct gk20a *g = get_gk20a(dbg_s->dev); | 1471 | struct gk20a *g = dbg_s->g; |
1472 | struct channel_gk20a *ch; | 1472 | struct channel_gk20a *ch; |
1473 | int err = 0, action = args->mode; | 1473 | int err = 0, action = args->mode; |
1474 | 1474 | ||