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authorDeepak Nibade <dnibade@nvidia.com>2015-12-21 04:51:49 -0500
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-04-19 11:07:45 -0400
commitb63c4bced5b01e2aef477ecfca784848e2a2cd3a (patch)
tree4309e72334876236efc29fd57bda6f49599c7732 /drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
parentdfac8ce70464413c0e3748634c57d49950e71933 (diff)
gpu: nvgpu: IOCTL to suspend/resume context
Add below IOCTL to suspend/resume a context NVGPU_DBG_GPU_IOCTL_SUSPEND_RESUME_CONTEXTS: Suspend sequence : - disable ctxsw - loop through list of channels - if channel is ctx resident, suspend all SMs - otherwise, disable channel/TSG - enable ctxsw Resume sequence : - disable ctxsw - loop through list of channels - if channel is ctx resident, resume all SMs - otherwise, enable channel/TSG - enable ctxsw Bug 200156699 Change-Id: Iacf1bf7877b67ddf87cc6891c37c758a4644b014 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/1120332 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c81
1 files changed, 50 insertions, 31 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
index 34685416..afc1517b 100644
--- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c
@@ -780,6 +780,42 @@ err_free:
780 return err; 780 return err;
781} 781}
782 782
783static int
784nvgpu_dbg_gpu_ioctl_suspend_resume_contexts(struct dbg_session_gk20a *dbg_s,
785 struct nvgpu_dbg_gpu_suspend_resume_contexts_args *args)
786{
787 struct gk20a *g = dbg_s->g;
788 int err = 0;
789 int ctx_resident_ch_fd = -1;
790
791 err = gk20a_busy(g->dev);
792 if (err)
793 return err;
794
795 switch (args->action) {
796 case NVGPU_DBG_GPU_SUSPEND_ALL_CONTEXTS:
797 err = g->ops.gr.suspend_contexts(g, dbg_s,
798 &ctx_resident_ch_fd);
799 break;
800
801 case NVGPU_DBG_GPU_RESUME_ALL_CONTEXTS:
802 err = gr_gk20a_resume_contexts(g, dbg_s,
803 &ctx_resident_ch_fd);
804 break;
805 }
806
807 if (ctx_resident_ch_fd < 0) {
808 args->is_resident_context = 0;
809 } else {
810 args->is_resident_context = 1;
811 args->resident_context_fd = ctx_resident_ch_fd;
812 }
813
814 gk20a_idle(g->dev);
815
816 return err;
817}
818
783long gk20a_dbg_gpu_dev_ioctl(struct file *filp, unsigned int cmd, 819long gk20a_dbg_gpu_dev_ioctl(struct file *filp, unsigned int cmd,
784 unsigned long arg) 820 unsigned long arg)
785{ 821{
@@ -897,6 +933,11 @@ long gk20a_dbg_gpu_dev_ioctl(struct file *filp, unsigned int cmd,
897 (struct nvgpu_dbg_gpu_unbind_channel_args *)buf); 933 (struct nvgpu_dbg_gpu_unbind_channel_args *)buf);
898 break; 934 break;
899 935
936 case NVGPU_DBG_GPU_IOCTL_SUSPEND_RESUME_CONTEXTS:
937 err = nvgpu_dbg_gpu_ioctl_suspend_resume_contexts(dbg_s,
938 (struct nvgpu_dbg_gpu_suspend_resume_contexts_args *)buf);
939 break;
940
900 default: 941 default:
901 gk20a_err(dev_from_gk20a(g), 942 gk20a_err(dev_from_gk20a(g),
902 "unrecognized dbg gpu ioctl cmd: 0x%x", 943 "unrecognized dbg gpu ioctl cmd: 0x%x",
@@ -1222,7 +1263,6 @@ static int nvgpu_dbg_gpu_ioctl_suspend_resume_sm(
1222{ 1263{
1223 struct gk20a *g = get_gk20a(dbg_s->dev); 1264 struct gk20a *g = get_gk20a(dbg_s->dev);
1224 struct channel_gk20a *ch; 1265 struct channel_gk20a *ch;
1225 bool ch_is_curr_ctx;
1226 int err = 0, action = args->mode; 1266 int err = 0, action = args->mode;
1227 1267
1228 gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "action: %d", args->mode); 1268 gk20a_dbg(gpu_dbg_fn | gpu_dbg_gpu_dbg, "action: %d", args->mode);
@@ -1234,10 +1274,6 @@ static int nvgpu_dbg_gpu_ioctl_suspend_resume_sm(
1234 mutex_lock(&g->dbg_sessions_lock); 1274 mutex_lock(&g->dbg_sessions_lock);
1235 1275
1236 /* Suspend GPU context switching */ 1276 /* Suspend GPU context switching */
1237 /* Disable channel switching.
1238 * at that point the hardware state can be inspected to
1239 * determine if the context we're interested in is current.
1240 */
1241 err = gr_gk20a_disable_ctxsw(g); 1277 err = gr_gk20a_disable_ctxsw(g);
1242 if (err) { 1278 if (err) {
1243 gk20a_err(dev_from_gk20a(g), "unable to stop gr ctxsw"); 1279 gk20a_err(dev_from_gk20a(g), "unable to stop gr ctxsw");
@@ -1245,40 +1281,23 @@ static int nvgpu_dbg_gpu_ioctl_suspend_resume_sm(
1245 goto clean_up; 1281 goto clean_up;
1246 } 1282 }
1247 1283
1248 /* find out whether the current channel is resident */ 1284 switch (action) {
1249 ch_is_curr_ctx = gk20a_is_channel_ctx_resident(ch); 1285 case NVGPU_DBG_GPU_SUSPEND_ALL_SMS:
1250 1286 gr_gk20a_suspend_context(ch);
1251 if (ch_is_curr_ctx) { 1287 break;
1252 switch (action) {
1253 case NVGPU_DBG_GPU_SUSPEND_ALL_SMS:
1254 gk20a_suspend_all_sms(g, 0, false);
1255 break;
1256
1257 case NVGPU_DBG_GPU_RESUME_ALL_SMS:
1258 gk20a_resume_all_sms(g);
1259 break;
1260 }
1261 } else {
1262 switch (action) {
1263 case NVGPU_DBG_GPU_SUSPEND_ALL_SMS:
1264 /* Disable the channel */
1265 channel_gk20a_disable(ch);
1266 break;
1267 1288
1268 case NVGPU_DBG_GPU_RESUME_ALL_SMS: 1289 case NVGPU_DBG_GPU_RESUME_ALL_SMS:
1269 /* Enable the channel */ 1290 gr_gk20a_resume_context(ch);
1270 channel_gk20a_enable(ch); 1291 break;
1271 break;
1272 }
1273 } 1292 }
1274 1293
1275 /* Resume GPU context switching */
1276 err = gr_gk20a_enable_ctxsw(g); 1294 err = gr_gk20a_enable_ctxsw(g);
1277 if (err) 1295 if (err)
1278 gk20a_err(dev_from_gk20a(g), "unable to restart ctxsw!\n"); 1296 gk20a_err(dev_from_gk20a(g), "unable to restart ctxsw!\n");
1279 1297
1280 clean_up: 1298clean_up:
1281 mutex_unlock(&g->dbg_sessions_lock); 1299 mutex_unlock(&g->dbg_sessions_lock);
1300
1282 return err; 1301 return err;
1283} 1302}
1284 1303