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| author | Alex Frid <afrid@nvidia.com> | 2014-09-26 01:44:26 -0400 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:11:32 -0400 |
| commit | 83bf2aa83d922080884a9fe547b656e24495e16e (patch) | |
| tree | f0911d3020da632c9976fbc9df01b111557d77a3 /drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |
| parent | 6b85e32d6c750c79264455636c2f8f55c409b51a (diff) | |
gpu: nvgpu: Prepare for GPCPLL NA data integration
In preparation for GM20B GPCPLL NA data integration:
- Added VCO control initialization code (no data, yet)
- Replaced absolute safe margin with relative percentage
(preliminary 8%)
- Retrieved maximum safe frequency at minimum voltage from GPU DVFS
table, instead of hard-coded macro (also fix the name of the limit:
maximum instead of minimum)
- Updated comments
Bug 1555318
Change-Id: I49a7a90cc4bc29e181065ebd2cf9d214edae6465
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/542462
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c')
0 files changed, 0 insertions, 0 deletions