diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2016-11-03 11:40:24 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-12-26 01:20:09 -0500 |
commit | 71fbfdb2b84a4f778f19e44421a66e28e5aadf8d (patch) | |
tree | 5bbc2e22682e73b64fa6492bdab27301f254d362 /drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |
parent | 66ed536fb5e57ad73ffbaf24f9c02f0655e7d6cc (diff) |
gpu: nvgpu: MSCG support
- Added enable_mscg, mscg_enabled & mscg_stat flags,
mscg_enabled flag can be used to controll
mscg enable/disable at runtime along with mscg_stat flag.
- Added defines & interface to support ms/mclk-change/post-init-param
- Added defines for lpwr tables read from vbios.
- HAL to support post init param which is require
to setup clockgating interface in PMU & interfaces used during
mscg state machine.
- gk20a_pmu_pg_global_enable() can be called when pg support
required to enable/disable, this also checks & wait
if pstate switch is in progress till it complets
- pg_mutex to protect PG-RPPG/MSCG enable/disable
JIRA DNVGPU-71
Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247554
(cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a)
Reviewed-on: http://git-master/r/1270971
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index cd3ab0c2..f86a7377 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
@@ -1169,8 +1169,8 @@ static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode) | |||
1169 | return -EPERM; | 1169 | return -EPERM; |
1170 | 1170 | ||
1171 | /*do elpg disable before clock gating */ | 1171 | /*do elpg disable before clock gating */ |
1172 | if (support_gk20a_pmu(g->dev)) | 1172 | gk20a_pmu_pg_global_enable(g, false); |
1173 | gk20a_pmu_disable_elpg(g); | 1173 | |
1174 | if (g->ops.clock_gating.slcg_gr_load_gating_prod) | 1174 | if (g->ops.clock_gating.slcg_gr_load_gating_prod) |
1175 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, | 1175 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, |
1176 | false); | 1176 | false); |
@@ -1216,8 +1216,7 @@ static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32 powermode) | |||
1216 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, | 1216 | g->ops.clock_gating.slcg_gr_load_gating_prod(g, |
1217 | g->slcg_enabled); | 1217 | g->slcg_enabled); |
1218 | 1218 | ||
1219 | if (support_gk20a_pmu(g->dev)) | 1219 | gk20a_pmu_pg_global_enable(g, true); |
1220 | gk20a_pmu_enable_elpg(g); | ||
1221 | 1220 | ||
1222 | gk20a_dbg(gpu_dbg_gpu_dbg | gpu_dbg_fn, "module idle"); | 1221 | gk20a_dbg(gpu_dbg_gpu_dbg | gpu_dbg_fn, "module idle"); |
1223 | gk20a_idle(dbg_s->dev); | 1222 | gk20a_idle(dbg_s->dev); |