diff options
| author | Peter Daifuku <pdaifuku@nvidia.com> | 2016-03-23 12:43:43 -0400 |
|---|---|---|
| committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-08 15:34:50 -0400 |
| commit | 6eeabfbdd08e48f924885952c80ff41aa2b534b7 (patch) | |
| tree | 5cdba48865faa0b76e20d0994fa9de9e4c12deed /drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |
| parent | e8bac374c0ed24f05bf389e1e8b5aca47f61bd3a (diff) | |
gpu: nvgpu: vgpu: virtualized SMPC/HWPM ctx switch
Add support for SMPC and HWPM context switching when virtualized
Bug 1648200
JIRASW EVLR-219
JIRASW EVLR-253
Change-Id: I80a1613eaad87d8510f00d9aef001400d642ecdf
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1122034
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c')
| -rw-r--r-- | drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c index 321cebb2..309fe75a 100644 --- a/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c | |||
| @@ -891,8 +891,8 @@ static int nvgpu_dbg_gpu_ioctl_smpc_ctxsw_mode(struct dbg_session_gk20a *dbg_s, | |||
| 891 | goto clean_up; | 891 | goto clean_up; |
| 892 | } | 892 | } |
| 893 | 893 | ||
| 894 | err = gr_gk20a_update_smpc_ctxsw_mode(g, ch_gk20a, | 894 | err = g->ops.gr.update_smpc_ctxsw_mode(g, ch_gk20a, |
| 895 | args->mode == NVGPU_DBG_GPU_SMPC_CTXSW_MODE_CTXSW); | 895 | args->mode == NVGPU_DBG_GPU_SMPC_CTXSW_MODE_CTXSW); |
| 896 | if (err) { | 896 | if (err) { |
| 897 | gk20a_err(dev_from_gk20a(g), | 897 | gk20a_err(dev_from_gk20a(g), |
| 898 | "error (%d) during smpc ctxsw mode update\n", err); | 898 | "error (%d) during smpc ctxsw mode update\n", err); |
| @@ -927,8 +927,8 @@ static int nvgpu_dbg_gpu_ioctl_hwpm_ctxsw_mode(struct dbg_session_gk20a *dbg_s, | |||
| 927 | goto clean_up; | 927 | goto clean_up; |
| 928 | } | 928 | } |
| 929 | 929 | ||
| 930 | err = gr_gk20a_update_hwpm_ctxsw_mode(g, ch_gk20a, | 930 | err = g->ops.gr.update_hwpm_ctxsw_mode(g, ch_gk20a, |
| 931 | args->mode == NVGPU_DBG_GPU_HWPM_CTXSW_MODE_CTXSW); | 931 | args->mode == NVGPU_DBG_GPU_HWPM_CTXSW_MODE_CTXSW); |
| 932 | if (err) | 932 | if (err) |
| 933 | gk20a_err(dev_from_gk20a(g), | 933 | gk20a_err(dev_from_gk20a(g), |
| 934 | "error (%d) during pm ctxsw mode update\n", err); | 934 | "error (%d) during pm ctxsw mode update\n", err); |