gpu: nvgpu: gk20a: Fix FBP/L2 masks, add GET_FBP_L2_MASKS

Fix FBP and ROP_L2 enable masks for Maxwell+. Deprecate rop_l2_en_mask
in GPU characteristics by adding _DEPRECATED postfix. The array is
too small to hold ROP_L2 enable masks for desktop GPUs.

Add NVGPU_GPU_IOCTL_GET_FBP_L2_MASKS to expose the ROP_L2 masks for
userspace.

Bug 200136909
Bug 200241845

Change-Id: I5ad5a5c09f3962ebb631b8d6e7a2f9df02f75ac7
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: http://git-master/r/1245294
(cherry picked from commit 0823b33e59defec341ea7919dae4e5f73a36d256)
Reviewed-on: http://git-master/r/1249883
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 28 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 2fdf719a..493cbe80 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -246,6 +246,30 @@ static int gk20a_ctrl_get_tpc_masks(struct gk20a *g,
         return err;
 }
 
+static int gk20a_ctrl_get_fbp_l2_masks(
+        struct gk20a *g, struct nvgpu_gpu_get_fbp_l2_masks_args *args)
+{
+        struct gr_gk20a *gr = &g->gr;
+        int err = 0;
+        const u32 fbp_l2_mask_size = sizeof(u32) * gr->max_fbps_count;
+
+        if (args->mask_buf_size > 0) {
+                size_t write_size = fbp_l2_mask_size;
+
+                if (write_size > args->mask_buf_size)
+                        write_size = args->mask_buf_size;
+
+                err = copy_to_user((void __user *)(uintptr_t)
+                                   args->mask_buf_addr,
+                                   gr->fbp_rop_l2_en_mask, write_size);
+        }
+
+        if (err == 0)
+                args->mask_buf_size = fbp_l2_mask_size;
+
+        return err;
+}
+
 static int nvgpu_gpu_ioctl_l2_fb_ops(struct gk20a *g,
                 struct nvgpu_gpu_l2_fb_args *args)
 {
@@ -936,6 +960,10 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
                 err = gk20a_ctrl_get_tpc_masks(g,
                         (struct nvgpu_gpu_get_tpc_masks_args *)buf);
                 break;
+        case NVGPU_GPU_IOCTL_GET_FBP_L2_MASKS:
+                err = gk20a_ctrl_get_fbp_l2_masks(g,
+                        (struct nvgpu_gpu_get_fbp_l2_masks_args *)buf);
+                break;
         case NVGPU_GPU_IOCTL_OPEN_CHANNEL:
                 /* this arg type here, but ..gpu_open_channel_args in nvgpu.h
                  * for consistency - they are the same */