gpu: nvgpu: GPU characteristics additions

Add the following info into GPU characteristics: available big page
sizes, support indicators for sync fence fds and cycle stats, gpc
mask, SM version, SM SPA version and warp count, and IOCTL interface
levels. Also, add new IOCTL to fetch TPC masks.

Bug 1551769
Bug 1558186

Change-Id: I8a47d882645f29c7bf0c8f74334ebf47240e41de
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: http://git-master/r/562904
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 28 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 93831844..3bcbdfd9 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -221,6 +221,30 @@ clean_up:
         return err;
 }
 
+static int gk20a_ctrl_get_tpc_masks(struct gk20a *g,
+                                    struct nvgpu_gpu_get_tpc_masks_args *args)
+{
+        struct gr_gk20a *gr = &g->gr;
+        int err = 0;
+        const u32 gpc_tpc_mask_size = sizeof(u32) * gr->gpc_count;
+
+        if (args->mask_buf_size > 0) {
+                size_t write_size = gpc_tpc_mask_size;
+
+                if (write_size > args->mask_buf_size)
+                        write_size = args->mask_buf_size;
+
+                err = copy_to_user((void __user *)(uintptr_t)
+                                   args->mask_buf_addr,
+                                   gr->gpc_tpc_mask, write_size);
+        }
+
+        if (err == 0)
+                args->mask_buf_size = gpc_tpc_mask_size;
+
+        return err;
+}
+
 long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 {
         struct platform_device *dev = filp->private_data;
@@ -390,6 +414,10 @@ long gk20a_ctrl_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg
                 err = gk20a_ctrl_open_tsg(g,
                         (struct nvgpu_gpu_open_tsg_args *)buf);
                 break;
+        case NVGPU_GPU_IOCTL_GET_TPC_MASKS:
+                err = gk20a_ctrl_get_tpc_masks(g,
+                        (struct nvgpu_gpu_get_tpc_masks_args *)buf);
+                break;
         default:
                 dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x", cmd);
                 err = -ENOTTY;