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authorRichard Zhao <rizhao@nvidia.com>2016-06-02 20:17:14 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-06-16 17:06:46 -0400
commit86225cb04eb040a83400d5ad6619b3c2318a53f8 (patch)
tree3c61b7b6831ee2f01c9977d77b3ac9bbaf0f3407 /drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
parent03164b0f4abeb06d4b5207531b97f11fe4a860dd (diff)
gpu: nvgpu: add read_ptimer to gops
Move all places that read ptimer to use the callback. It's for add vgpu implementation of read ptimer. Bug 1395833 Change-Id: Ia339f2f08d75ca4969a443fffc9a61cff1d3d2b7 Signed-off-by: Richard Zhao <rizhao@nvidia.com> Reviewed-on: http://git-master/r/1159587 (cherry picked from commit a01f804684f875c9cffc31eb2c1038f2f29ec66f) Reviewed-on: http://git-master/r/1158449 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c43
1 files changed, 5 insertions, 38 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 39581eb2..3e34b6b8 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -626,50 +626,17 @@ static int nvgpu_gpu_get_gpu_time(
626 struct gk20a *g, 626 struct gk20a *g,
627 struct nvgpu_gpu_get_gpu_time_args *args) 627 struct nvgpu_gpu_get_gpu_time_args *args)
628{ 628{
629 int err = 0; 629 u64 time;
630 const unsigned int max_iterations = 3; 630 int err;
631 unsigned int i = 0;
632 u32 gpu_timestamp_hi_prev = 0;
633 631
634 err = gk20a_busy(g->dev); 632 err = gk20a_busy(g->dev);
635 if (err) 633 if (err)
636 return err; 634 return err;
637 635
638 /* Note. The GPU nanosecond timer consists of two 32-bit 636 err = g->ops.read_ptimer(g, &time);
639 * registers (high & low). To detect a possible low register 637 if (!err)
640 * wrap-around between the reads, we need to read the high 638 args->gpu_timestamp = time;
641 * register before and after low. The wraparound happens
642 * approximately once per 4 secs. */
643 639
644 /* get initial gpu_timestamp_hi value */
645 gpu_timestamp_hi_prev = gk20a_readl(g, timer_time_1_r());
646
647 for (i = 0; i < max_iterations; ++i) {
648 u32 gpu_timestamp_hi = 0;
649 u32 gpu_timestamp_lo = 0;
650
651 rmb(); /* maintain read order */
652 gpu_timestamp_lo = gk20a_readl(g, timer_time_0_r());
653 rmb(); /* maintain read order */
654 gpu_timestamp_hi = gk20a_readl(g, timer_time_1_r());
655
656 if (gpu_timestamp_hi == gpu_timestamp_hi_prev) {
657 args->gpu_timestamp =
658 (((u64)gpu_timestamp_hi) << 32) |
659 gpu_timestamp_lo;
660 goto clean_up;
661 }
662
663 /* wrap-around detected, retry */
664 gpu_timestamp_hi_prev = gpu_timestamp_hi;
665 }
666
667 /* too many iterations, bail out */
668 gk20a_err(dev_from_gk20a(g),
669 "Failed to read GPU time. Clock or bus unstable?\n");
670 err = -EBUSY;
671
672clean_up:
673 gk20a_idle(g->dev); 640 gk20a_idle(g->dev);
674 return err; 641 return err;
675} 642}