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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-04-06 16:10:32 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-04-15 11:48:20 -0400
commit6839341bf8ffafa115cfc0427bba694ee1d131f3 (patch)
tree1f9369a3bacf0f1a2cc23371f5de988efdc07c31 /drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
parent61e009c0f8874898335e6c47a610233c3382be47 (diff)
gpu: nvgpu: Add litter values HAL
Move per-chip constants to be returned by a chip specific function. Implement get_litter_value() for each chip. Change-Id: I2a2730fce14010924d2507f6fa15cc2ea0795113 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1121383
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 87f0683f..b1d35141 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -28,7 +28,6 @@
28#include "regops_gk20a.h" 28#include "regops_gk20a.h"
29#include "hw_gr_gk20a.h" 29#include "hw_gr_gk20a.h"
30#include "hw_fb_gk20a.h" 30#include "hw_fb_gk20a.h"
31#include "hw_proj_gk20a.h"
32#include "hw_timer_gk20a.h" 31#include "hw_timer_gk20a.h"
33 32
34int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp) 33int gk20a_ctrl_dev_open(struct inode *inode, struct file *filp)
@@ -451,15 +450,17 @@ static int nvgpu_gpu_ioctl_clear_sm_errors(struct gk20a *g)
451 u32 gpc_offset, tpc_offset, gpc, tpc; 450 u32 gpc_offset, tpc_offset, gpc, tpc;
452 struct gr_gk20a *gr = &g->gr; 451 struct gr_gk20a *gr = &g->gr;
453 u32 global_esr; 452 u32 global_esr;
453 u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
454 u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE);
454 455
455 for (gpc = 0; gpc < gr->gpc_count; gpc++) { 456 for (gpc = 0; gpc < gr->gpc_count; gpc++) {
456 457
457 gpc_offset = proj_gpc_stride_v() * gpc; 458 gpc_offset = gpc_stride * gpc;
458 459
459 /* check if any tpc has an exception */ 460 /* check if any tpc has an exception */
460 for (tpc = 0; tpc < gr->tpc_count; tpc++) { 461 for (tpc = 0; tpc < gr->tpc_count; tpc++) {
461 462
462 tpc_offset = proj_tpc_in_gpc_stride_v() * tpc; 463 tpc_offset = tpc_in_gpc_stride * tpc;
463 464
464 global_esr = gk20a_readl(g, 465 global_esr = gk20a_readl(g,
465 gr_gpc0_tpc0_sm_hww_global_esr_r() + 466 gr_gpc0_tpc0_sm_hww_global_esr_r() +
@@ -482,13 +483,15 @@ static int nvgpu_gpu_ioctl_has_any_exception(
482 struct gr_gk20a *gr = &g->gr; 483 struct gr_gk20a *gr = &g->gr;
483 u32 sm_id, tpc_exception_en = 0; 484 u32 sm_id, tpc_exception_en = 0;
484 u32 offset, regval, tpc_offset, gpc_offset; 485 u32 offset, regval, tpc_offset, gpc_offset;
486 u32 gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_GPC_STRIDE);
487 u32 tpc_in_gpc_stride = nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE);
485 488
486 mutex_lock(&g->dbg_sessions_lock); 489 mutex_lock(&g->dbg_sessions_lock);
487 490
488 for (sm_id = 0; sm_id < gr->no_of_sm; sm_id++) { 491 for (sm_id = 0; sm_id < gr->no_of_sm; sm_id++) {
489 492
490 tpc_offset = proj_tpc_in_gpc_stride_v() * g->gr.sm_to_cluster[sm_id].tpc_index; 493 tpc_offset = tpc_in_gpc_stride * g->gr.sm_to_cluster[sm_id].tpc_index;
491 gpc_offset = proj_gpc_stride_v() * g->gr.sm_to_cluster[sm_id].gpc_index; 494 gpc_offset = gpc_stride * g->gr.sm_to_cluster[sm_id].gpc_index;
492 offset = tpc_offset + gpc_offset; 495 offset = tpc_offset + gpc_offset;
493 496
494 regval = gk20a_readl(g, gr_gpc0_tpc0_tpccs_tpc_exception_en_r() + 497 regval = gk20a_readl(g, gr_gpc0_tpc0_tpccs_tpc_exception_en_r() +