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authorThomas Fleury <tfleury@nvidia.com>2017-01-20 20:40:11 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-03-02 05:03:35 -0500
commit09504cdbc3e1c37ca1bb846f647a1d67c21b0818 (patch)
tree914ed38db1b174e59b8b22ee88df72dac6ad117a /drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
parent0a3e5941ffed3239661ea48381ebece2c7a707f2 (diff)
gpu: nvgpu: remove clock domain aliases
Remove MCLK and GPCCLK domain aliases, now that userspace has swithed to new enumerations. Jira DNVGPU-211 Change-Id: I2af2fd67dbed47088d7161ba0605e13dd7c674a5 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1292609 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
index 351be55e..e2a97caa 100644
--- a/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ctrl_gk20a.c
@@ -987,10 +987,7 @@ static int nvgpu_gpu_clk_get_range(struct gk20a *g,
987 return -EFAULT; 987 return -EFAULT;
988 } else { 988 } else {
989 bit = ffs(clk_domains) - 1; 989 bit = ffs(clk_domains) - 1;
990 if (bit <= NVGPU_GPU_CLK_DOMAIN_GPCCLK) 990 clk_range.clk_domain = bit;
991 clk_range.clk_domain = bit;
992 else
993 clk_range.clk_domain = BIT(bit);
994 clk_domains &= ~BIT(bit); 991 clk_domains &= ~BIT(bit);
995 } 992 }
996 993
@@ -1139,10 +1136,7 @@ static int nvgpu_gpu_clk_get_info(struct gk20a *g,
1139 return -EFAULT; 1136 return -EFAULT;
1140 } else { 1137 } else {
1141 bit = ffs(clk_domains) - 1; 1138 bit = ffs(clk_domains) - 1;
1142 if (bit <= NVGPU_GPU_CLK_DOMAIN_GPCCLK) 1139 clk_info.clk_domain = bit;
1143 clk_info.clk_domain = bit;
1144 else
1145 clk_info.clk_domain = BIT(bit);
1146 clk_domains &= ~BIT(bit); 1140 clk_domains &= ~BIT(bit);
1147 clk_info.clk_type = args->clk_type; 1141 clk_info.clk_type = args->clk_type;
1148 } 1142 }