diff options
author | Arto Merilainen <amerilainen@nvidia.com> | 2014-03-19 03:38:25 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:08:53 -0400 |
commit | a9785995d5f22aaeb659285f8aeb64d8b56982e0 (patch) | |
tree | cc75f75bcf43db316a002a7a240b81f299bf6d7f /drivers/gpu/nvgpu/gk20a/clk_gk20a.h | |
parent | 61efaf843c22b85424036ec98015121c08f5f16c (diff) |
gpu: nvgpu: Add NVIDIA GPU Driver
This patch moves the NVIDIA GPU driver to a new location.
Bug 1482562
Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/383722
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/clk_gk20a.h')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/clk_gk20a.h | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.h b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h new file mode 100644 index 00000000..d2665259 --- /dev/null +++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.h | |||
@@ -0,0 +1,94 @@ | |||
1 | /* | ||
2 | * drivers/video/tegra/host/gk20a/clk_gk20a.h | ||
3 | * | ||
4 | * GK20A Graphics | ||
5 | * | ||
6 | * Copyright (c) 2011 - 2014, NVIDIA CORPORATION. All rights reserved. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms and conditions of the GNU General Public License, | ||
10 | * version 2, as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
15 | * more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along with | ||
18 | * this program; if not, write to the Free Software Foundation, Inc., | ||
19 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
20 | */ | ||
21 | #ifndef _NVHOST_CLK_GK20A_H_ | ||
22 | #define _NVHOST_CLK_GK20A_H_ | ||
23 | |||
24 | #include <linux/mutex.h> | ||
25 | |||
26 | #define GPUFREQ_TABLE_END ~(u32)1 | ||
27 | enum { | ||
28 | /* only one PLL for gk20a */ | ||
29 | GK20A_GPC_PLL = 0, | ||
30 | }; | ||
31 | |||
32 | struct pll { | ||
33 | u32 id; | ||
34 | u32 clk_in; /* MHz */ | ||
35 | u32 M; | ||
36 | u32 N; | ||
37 | u32 PL; | ||
38 | u32 freq; /* MHz */ | ||
39 | bool enabled; | ||
40 | }; | ||
41 | |||
42 | struct pll_parms { | ||
43 | u32 min_freq, max_freq; /* MHz */ | ||
44 | u32 min_vco, max_vco; /* MHz */ | ||
45 | u32 min_u, max_u; /* MHz */ | ||
46 | u32 min_M, max_M; | ||
47 | u32 min_N, max_N; | ||
48 | u32 min_PL, max_PL; | ||
49 | }; | ||
50 | |||
51 | struct clk_gk20a { | ||
52 | struct gk20a *g; | ||
53 | struct clk *tegra_clk; | ||
54 | struct pll gpc_pll; | ||
55 | u32 pll_delay; /* default PLL settle time */ | ||
56 | struct mutex clk_mutex; | ||
57 | bool sw_ready; | ||
58 | bool clk_hw_on; | ||
59 | }; | ||
60 | |||
61 | struct gpufreq_table_data { | ||
62 | unsigned int index; | ||
63 | unsigned int frequency; /* MHz */ | ||
64 | }; | ||
65 | |||
66 | struct gpufreq_table_data *tegra_gpufreq_table_get(void); | ||
67 | |||
68 | unsigned int tegra_gpufreq_table_size_get(void); | ||
69 | |||
70 | int gk20a_init_clk_support(struct gk20a *g); | ||
71 | |||
72 | unsigned long gk20a_clk_get_rate(struct gk20a *g); | ||
73 | int gk20a_clk_set_rate(struct gk20a *g, unsigned long rate); | ||
74 | int gk20a_suspend_clk_support(struct gk20a *g); | ||
75 | struct clk *gk20a_clk_get(struct gk20a *g); | ||
76 | long gk20a_clk_round_rate(struct gk20a *g, unsigned long rate); | ||
77 | |||
78 | extern struct pll_parms gpc_pll_params; | ||
79 | |||
80 | #define KHZ 1000 | ||
81 | #define MHZ 1000000 | ||
82 | |||
83 | static inline unsigned long rate_gpc2clk_to_gpu(unsigned long rate) | ||
84 | { | ||
85 | /* convert the MHz gpc2clk frequency to Hz gpcpll frequency */ | ||
86 | return (rate * MHZ) / 2; | ||
87 | } | ||
88 | static inline unsigned long rate_gpu_to_gpc2clk(unsigned long rate) | ||
89 | { | ||
90 | /* convert the Hz gpcpll frequency to MHz gpc2clk frequency */ | ||
91 | return (rate * 2) / MHZ; | ||
92 | } | ||
93 | |||
94 | #endif /* _NVHOST_CLK_GK20A_H_ */ | ||