diff options
author | Debarshi Dutta <ddutta@nvidia.com> | 2017-08-03 06:04:44 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-17 17:26:47 -0400 |
commit | 98186ec2c2127c2af65a34f9e697e04f518a79ab (patch) | |
tree | 08ad87f3bf8c739e96b36f01728a8f7a30749a0e /drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c | |
parent | 49dc335cfe588179cbb42d8bab53bc76ba88b28f (diff) |
gpu: nvgpu: Add wrapper over atomic_t and atomic64_t
- added wrapper structs nvgpu_atomic_t and nvgpu_atomic64_t over
atomic_t and atomic64_t
- added nvgpu_atomic_* and nvgpu_atomic64_* APIs to access the above
wrappers.
JIRA NVGPU-121
Change-Id: I61667bb0a84c2fc475365abb79bffb42b8b4786a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1533044
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c index c9c03d37..aa340ba6 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c | |||
@@ -346,7 +346,7 @@ gk20a_channel_syncpt_create(struct channel_gk20a *c) | |||
346 | 346 | ||
347 | nvgpu_nvhost_syncpt_set_min_eq_max_ext(sp->nvhost_dev, sp->id); | 347 | nvgpu_nvhost_syncpt_set_min_eq_max_ext(sp->nvhost_dev, sp->id); |
348 | 348 | ||
349 | atomic_set(&sp->ops.refcount, 0); | 349 | nvgpu_atomic_set(&sp->ops.refcount, 0); |
350 | sp->ops.wait_syncpt = gk20a_channel_syncpt_wait_syncpt; | 350 | sp->ops.wait_syncpt = gk20a_channel_syncpt_wait_syncpt; |
351 | sp->ops.wait_fd = gk20a_channel_syncpt_wait_fd; | 351 | sp->ops.wait_fd = gk20a_channel_syncpt_wait_fd; |
352 | sp->ops.incr = gk20a_channel_syncpt_incr; | 352 | sp->ops.incr = gk20a_channel_syncpt_incr; |
@@ -619,7 +619,7 @@ static int __semaphore_wait_fd_fast_path(struct channel_gk20a *c, | |||
619 | return err; | 619 | return err; |
620 | 620 | ||
621 | nvgpu_semaphore_get(sema); | 621 | nvgpu_semaphore_get(sema); |
622 | BUG_ON(!atomic_read(&sema->value)); | 622 | BUG_ON(!nvgpu_atomic_read(&sema->value)); |
623 | add_sema_cmd(c->g, c, sema, wait_cmd, 8, true, false); | 623 | add_sema_cmd(c->g, c, sema, wait_cmd, 8, true, false); |
624 | 624 | ||
625 | /* | 625 | /* |
@@ -922,7 +922,7 @@ gk20a_channel_semaphore_create(struct channel_gk20a *c) | |||
922 | return NULL; | 922 | return NULL; |
923 | } | 923 | } |
924 | #endif | 924 | #endif |
925 | atomic_set(&sema->ops.refcount, 0); | 925 | nvgpu_atomic_set(&sema->ops.refcount, 0); |
926 | sema->ops.wait_syncpt = gk20a_channel_semaphore_wait_syncpt; | 926 | sema->ops.wait_syncpt = gk20a_channel_semaphore_wait_syncpt; |
927 | sema->ops.wait_fd = gk20a_channel_semaphore_wait_fd; | 927 | sema->ops.wait_fd = gk20a_channel_semaphore_wait_fd; |
928 | sema->ops.incr = gk20a_channel_semaphore_incr; | 928 | sema->ops.incr = gk20a_channel_semaphore_incr; |