gpu: nvgpu: use common nvgpu mutex/spinlock APIs

Instead of using Linux APIs for mutex and spinlocks
directly, use new APIs defined in <nvgpu/lock.h>

Replace Linux specific mutex/spinlock declaration,
init, lock, unlock APIs with new APIs
e.g
struct mutex is replaced by struct nvgpu_mutex and
mutex_lock() is replaced by nvgpu_mutex_acquire()

And also include <nvgpu/lock.h> instead of including
<linux/mutex.h> and <linux/spinlock.h>

Add explicit nvgpu/lock.h includes to below
files to fix complilation failures.
gk20a/platform_gk20a.h
include/nvgpu/allocator.h

Jira NVGPU-13

Change-Id: I81a05d21ecdbd90c2076a9f0aefd0e40b215bd33
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1293187
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 6 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
index 18971b09..097635a7 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
@@ -414,9 +414,9 @@ struct wait_fence_work {
 static void gk20a_add_pending_sema_wait(struct gk20a *g,
                                         struct wait_fence_work *work)
 {
-        raw_spin_lock(&g->pending_sema_waits_lock);
+        nvgpu_raw_spinlock_acquire(&g->pending_sema_waits_lock);
         list_add(&work->entry, &g->pending_sema_waits);
-        raw_spin_unlock(&g->pending_sema_waits_lock);
+        nvgpu_raw_spinlock_release(&g->pending_sema_waits_lock);
 }
 
 /*
@@ -426,9 +426,9 @@ static void gk20a_add_pending_sema_wait(struct gk20a *g,
 static void gk20a_start_sema_wait_cancel(struct gk20a *g,
                                          struct list_head *list)
 {
-        raw_spin_lock(&g->pending_sema_waits_lock);
+        nvgpu_raw_spinlock_acquire(&g->pending_sema_waits_lock);
         list_replace_init(&g->pending_sema_waits, list);
-        raw_spin_unlock(&g->pending_sema_waits_lock);
+        nvgpu_raw_spinlock_release(&g->pending_sema_waits_lock);
 }
 
 /*
@@ -486,10 +486,10 @@ static void gk20a_channel_semaphore_launcher(
          * This spinlock must protect a _very_ small critical section -
          * otherwise it's possible that the deterministic submit path suffers.
          */
-        raw_spin_lock(&g->pending_sema_waits_lock);
+        nvgpu_raw_spinlock_acquire(&g->pending_sema_waits_lock);
         if (!list_empty(&g->pending_sema_waits))
                 list_del_init(&w->entry);
-        raw_spin_unlock(&g->pending_sema_waits_lock);
+        nvgpu_raw_spinlock_release(&g->pending_sema_waits_lock);
 
         gk20a_dbg_info("waiting for pre fence %p '%s'",
                         fence, fence->name);