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authorAlex Waterman <alexw@nvidia.com>2017-04-12 14:27:48 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-25 17:26:00 -0400
commit84dadb1a9ae2ab0473976ebf5ece1cb0d1e60205 (patch)
tree8ec8d404c319082dc472eae1ca1b56f2b7e7c197 /drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
parentaff9d46c00a2a82c93d6cc43d790584e7e474d0e (diff)
gpu: nvgpu: Move semaphore impl to nvgpu_mem
Use struct nvgpu_mem for DMA allocations (and the corresponding nvgpu_dma_alloc_sys()) instead of custom rolled code. This migrates away from using linux scatter gather tables directly. Instead this is hidden in the nvgpu_mem struct. With this change the semaphore.c code no longer has any direct Linux dependencies. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I92167c98aac9b413ae87496744dcee051cd60207 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1464081 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
index b509c5c4..3fb35e94 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_sync_gk20a.c
@@ -576,16 +576,16 @@ static void add_sema_cmd(struct gk20a *g, struct channel_gk20a *c,
576 } 576 }
577 577
578 if (acquire) 578 if (acquire)
579 gpu_sema_verbose_dbg("(A) c=%d ACQ_GE %-4u owner=%-3d" 579 gpu_sema_verbose_dbg(g, "(A) c=%d ACQ_GE %-4u owner=%-3d"
580 "va=0x%llx cmd_mem=0x%llx b=0x%llx off=%u", 580 "va=0x%llx cmd_mem=0x%llx b=0x%llx off=%u",
581 ch, nvgpu_semaphore_get_value(s), 581 ch, nvgpu_semaphore_get_value(s),
582 s->hw_sema->ch->hw_chid, va, cmd->gva, 582 s->hw_sema->ch->hw_chid, va, cmd->gva,
583 cmd->mem->gpu_va, ob); 583 cmd->mem->gpu_va, ob);
584 else 584 else
585 gpu_sema_verbose_dbg("(R) c=%d INCR %u (%u) va=0x%llx " 585 gpu_sema_verbose_dbg(g, "(R) c=%d INCR %u (%u) va=0x%llx "
586 "cmd_mem=0x%llx b=0x%llx off=%u", 586 "cmd_mem=0x%llx b=0x%llx off=%u",
587 ch, nvgpu_semaphore_get_value(s), 587 ch, nvgpu_semaphore_get_value(s),
588 readl(s->hw_sema->value), va, cmd->gva, 588 nvgpu_semaphore_read(s), va, cmd->gva,
589 cmd->mem->gpu_va, ob); 589 cmd->mem->gpu_va, ob);
590} 590}
591 591