summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
diff options
context:
space:
mode:
authorArto Merilainen <amerilainen@nvidia.com>2014-07-03 05:07:30 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:10:24 -0400
commitd608aa53ee338922cbd47ec144cd6efb36fd0295 (patch)
treeb713238e0541dec4f85d45ee68276b5e643b8421 /drivers/gpu/nvgpu/gk20a/channel_gk20a.h
parentf554ab30463438e5ce76ecf897a527ba5881fdbf (diff)
Revert "gpu: nvgpu: Dump offending push buffer fragment"
Channel and gpfifo allocations are entirely separated from each other, however, the code here assumes that active channel means that the channel also has a gpfifo. This reverts commit a24602f094380539788696d1b1567a4f4d914b17 which added gpfifo dump. Changing debug dumping to be safe requires refactoring the channel release code to use proper locking. Bug 1530226 Change-Id: I2fb02542a17dd56a0a9ce732b327e34b85ade8b9 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-on: http://git-master/r/434038 Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index 21949012..08bc06c2 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -162,8 +162,6 @@ void gk20a_set_error_notifier(struct channel_gk20a *ch, __u32 error);
162void gk20a_channel_semaphore_wakeup(struct gk20a *g); 162void gk20a_channel_semaphore_wakeup(struct gk20a *g);
163int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size, 163int gk20a_channel_alloc_priv_cmdbuf(struct channel_gk20a *c, u32 size,
164 struct priv_cmd_entry **entry); 164 struct priv_cmd_entry **entry);
165int gk20a_find_from_priv_cmdbuf(struct channel_gk20a *c,
166 u64 addr, u32 **cpu_va);
167 165
168int gk20a_channel_suspend(struct gk20a *g); 166int gk20a_channel_suspend(struct gk20a *g);
169int gk20a_channel_resume(struct gk20a *g); 167int gk20a_channel_resume(struct gk20a *g);