gpu: nvgpu: pass pid/tid from os specific code to common code

linux driver runs in user's process but qnx driver has dedicate driver
process, so they have different way to get user pid. nvgpu common code
expect calls from os specific code pass pid/tid.

ce/cde open channel for internal use, we use driver pid.

Jira VQRM-3534

Change-Id: I892372ac5f1dc4d25f9928d16992bcc659d12a56
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1694145
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index 7fcc54cc..2b8be069 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -367,7 +367,8 @@ int gk20a_wait_channel_idle(struct channel_gk20a *ch);
 /* runlist_id -1 is synonym for ENGINE_GR_GK20A runlist id */
 struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g,
                 s32 runlist_id,
-                bool is_privileged_channel);
+                bool is_privileged_channel,
+                pid_t pid, pid_t tid);
 
 int gk20a_channel_alloc_gpfifo(struct channel_gk20a *c,
                 struct nvgpu_gpfifo_args *gpfifo_args);