summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
diff options
context:
space:
mode:
authorDavid Li <davli@nvidia.com>2018-04-26 05:00:01 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-05-18 02:34:20 -0400
commita807cf20419af737a79a3d0c7fcc1068ac6b724a (patch)
tree4efc94d09217bd5e7fdad973b8dacfdee9bab8dd /drivers/gpu/nvgpu/gk20a/channel_gk20a.h
parent8ac538e1b16c68ef4a5b9d85a82bbfc2b3fabd72 (diff)
gpu: nvgpu: add NVGPU_IOCTL_CHANNEL_RESCHEDULE_RUNLIST
Add NVGPU_IOCTL_CHANNEL_RESCHEDULE_RUNLIST ioctl to reschedule runlist, and optionally check host and FECS status to preempt pending load of context not belonging to the calling channel on GR engine during context switch. This should be called immediately after a submit to decrease worst case submit to start latency for high interleave channel. There is less than 0.002% chance that the ioctl blocks up to couple miliseconds due to race condition of FECS status changing while being read. For GV11B it will always preempt pending load of unwanted context since there is no chance that ioctl blocks due to race condition. Also fix bug with host reschedule for multiple runlists which needs to write both runlist registers. Bug 1987640 Bug 1924808 Change-Id: I0b7e2f91bd18b0b20928e5a3311b9426b1bf1848 Signed-off-by: David Li <davli@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1549050 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_gk20a.h')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index 5e8cab0d..f95184be 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -54,7 +54,6 @@ struct fifo_profile_gk20a;
54#define NVGPU_SUBMIT_FLAGS_SYNC_FENCE (1 << 3) 54#define NVGPU_SUBMIT_FLAGS_SYNC_FENCE (1 << 3)
55#define NVGPU_SUBMIT_FLAGS_SUPPRESS_WFI (1 << 4) 55#define NVGPU_SUBMIT_FLAGS_SUPPRESS_WFI (1 << 4)
56#define NVGPU_SUBMIT_FLAGS_SKIP_BUFFER_REFCOUNTING (1 << 5) 56#define NVGPU_SUBMIT_FLAGS_SKIP_BUFFER_REFCOUNTING (1 << 5)
57#define NVGPU_SUBMIT_FLAGS_RESCHEDULE_RUNLIST (1 << 6)
58 57
59/* 58/*
60 * The binary format of 'struct nvgpu_channel_fence' introduced here 59 * The binary format of 'struct nvgpu_channel_fence' introduced here