gpu: nvgpu: move priv cmd definitions to channel

struct priv_cmd_queue and struct priv_cmd_entry are related to the list
of jobs in a channel, so move their definitions from the mm header to
the channel header.

Jira NVGPU-967

Change-Id: Ib0cf3fd52be463e720165a47e56b14724273473e
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1807371
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 17 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
index 0ef63d18..51207552 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.h
@@ -30,7 +30,7 @@
 #include <nvgpu/cond.h>
 #include <nvgpu/atomic.h>
 #include <nvgpu/nvgpu_mem.h>
-
+#include <nvgpu/allocator.h>
 
 struct gk20a;
 struct dbg_session_gk20a;
@@ -109,6 +109,22 @@ struct notification {
         u16 status;
 };
 
+struct priv_cmd_queue {
+        struct nvgpu_mem mem;
+        u32 size;       /* num of entries in words */
+        u32 put;        /* put for priv cmd queue */
+        u32 get;        /* get for priv cmd queue */
+};
+
+struct priv_cmd_entry {
+        bool valid;
+        struct nvgpu_mem *mem;
+        u32 off;        /* offset in mem, in u32 entries */
+        u64 gva;
+        u32 get;        /* start of entry in queue */
+        u32 size;       /* in words */
+};
+
 struct channel_gk20a_job {
         struct nvgpu_mapped_buf **mapped_buffers;
         int num_mapped_buffers;