gpu: nvgpu: enable semaphore acquire timeout

It'll detect dead semaphore acquire. The worst case is when
ACQUIRE_SWITCH is disabled, semaphore acquire will poll and
consume full gpu timeslicees.

The timeout value is set to half of channel WDT.

Bug 1636800

Change-Id: Ida6ccc534006a191513edf47e7b82d4b5b758684
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/928827
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>

1 files changed, 36 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index b480c80a..a5c2efb3 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -1,7 +1,7 @@
 /*
  * GK20A Graphics channel
  *
- * Copyright (c) 2011-2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -62,6 +62,8 @@ static int channel_gk20a_update_runlist(struct channel_gk20a *c,
                                         bool add);
 static void gk20a_free_error_notifiers(struct channel_gk20a *ch);
 
+static u32 gk20a_get_channel_watchdog_timeout(struct channel_gk20a *ch);
+
 /* allocate GPU channel */
 static struct channel_gk20a *allocate_channel(struct fifo_gk20a *f)
 {
@@ -204,6 +206,38 @@ static int channel_gk20a_set_schedule_params(struct channel_gk20a *c,
         return 0;
 }
 
+u32 channel_gk20a_pbdma_acquire_val(struct channel_gk20a *c)
+{
+        u32 val, exp, man;
+        u64 timeout;
+        int val_len;
+
+        timeout = gk20a_get_channel_watchdog_timeout(c);
+        do_div(timeout, 2); /* set acquire timeout to half of channel wdt */
+        timeout *= 1000000UL; /* ms -> ns */
+        do_div(timeout, 1024); /* in unit of 1024ns */
+        val_len = fls(timeout >> 32) + 32;
+        if (val_len == 32)
+                val_len = fls(timeout);
+        if (val_len > 16 + pbdma_acquire_timeout_exp_max_v()) { /* man: 16bits */
+                exp = pbdma_acquire_timeout_exp_max_v();
+                man = pbdma_acquire_timeout_man_max_v();
+        } else if (val_len > 16) {
+                exp = val_len - 16;
+                man = timeout >> exp;
+        } else {
+                exp = 0;
+                man = timeout;
+        }
+
+        val = pbdma_acquire_retry_man_2_f() |
+                pbdma_acquire_retry_exp_2_f() |
+                pbdma_acquire_timeout_exp_f(exp) |
+                pbdma_acquire_timeout_man_f(man) |
+                pbdma_acquire_timeout_en_enable_f();
+        return val;
+}
+
 int channel_gk20a_setup_ramfc(struct channel_gk20a *c,
                         u64 gpfifo_base, u32 gpfifo_entries, u32 flags)
 {
@@ -249,11 +283,7 @@ int channel_gk20a_setup_ramfc(struct channel_gk20a *c,
         gk20a_mem_wr32(inst_ptr, ram_fc_target_w(), pbdma_target_engine_sw_f());
 
         gk20a_mem_wr32(inst_ptr, ram_fc_acquire_w(),
-                pbdma_acquire_retry_man_2_f() |
-                pbdma_acquire_retry_exp_2_f() |
-                pbdma_acquire_timeout_exp_max_f() |
-                pbdma_acquire_timeout_man_max_f() |
-                pbdma_acquire_timeout_en_disable_f());
+                channel_gk20a_pbdma_acquire_val(c));
 
         gk20a_mem_wr32(inst_ptr, ram_fc_runlist_timeslice_w(),
                 fifo_runlist_timeslice_timeout_128_f() |