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authorKonsta Holtta <kholtta@nvidia.com>2018-03-12 04:37:38 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-03-13 05:43:37 -0400
commit86943d3d03953cc88b3e8a85aa232493b729137a (patch)
treef70caf4e93c13c541a33ad0a8f63122715ec8cc6 /drivers/gpu/nvgpu/gk20a/channel_gk20a.c
parentc6e8257c445ad7cd3924673ac2e36f9dde796f0f (diff)
gpu: nvgpu: decouple sema and hw sema
struct nvgpu_semaphore represents (mainly) a threshold value that a sema at some index will get and struct nvgpu_semaphore_int (aka "hw_sema") represents the allocation (and write access) of a semaphore index and the next value that the sema at that index can have. The threshold object doesn't need a pointer to the sema allocation that is not even guaranteed to exist for the whole threshold lifetime, so replace the pointer by the position of the sema in the sema pool. This requires some modifications to pass a hw sema around explicitly because it now represents write access more explicitly. Delete also the index field of semaphore_int because it can be directly derived from the offset in the sema location and is thus unnecessary. Jira NVGPU-512 Change-Id: I40be523fd68327e2f9928f10de4f771fe24d49ee Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1658102 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index 5cd7223f..fb7406da 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -215,7 +215,8 @@ void gk20a_channel_abort_clean_up(struct channel_gk20a *ch)
215 job = &ch->joblist.pre_alloc.jobs[tmp_get]; 215 job = &ch->joblist.pre_alloc.jobs[tmp_get];
216 if (job->post_fence->semaphore) { 216 if (job->post_fence->semaphore) {
217 __nvgpu_semaphore_release( 217 __nvgpu_semaphore_release(
218 job->post_fence->semaphore, true); 218 job->post_fence->semaphore, true,
219 ch->hw_sema);
219 released_job_semaphore = true; 220 released_job_semaphore = true;
220 } 221 }
221 tmp_get = (tmp_get + 1) % ch->joblist.pre_alloc.length; 222 tmp_get = (tmp_get + 1) % ch->joblist.pre_alloc.length;
@@ -226,7 +227,8 @@ void gk20a_channel_abort_clean_up(struct channel_gk20a *ch)
226 channel_gk20a_job, list) { 227 channel_gk20a_job, list) {
227 if (job->post_fence->semaphore) { 228 if (job->post_fence->semaphore) {
228 __nvgpu_semaphore_release( 229 __nvgpu_semaphore_release(
229 job->post_fence->semaphore, true); 230 job->post_fence->semaphore, true,
231 ch->hw_sema);
230 released_job_semaphore = true; 232 released_job_semaphore = true;
231 } 233 }
232 } 234 }