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authorTerje Bergstrom <tbergstrom@nvidia.com>2016-03-31 14:13:42 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-04-15 11:50:34 -0400
commit7d8e2193893454bc8e05543c956fab32b8eed54b (patch)
treeafb73b81611136fd0411e17995532d6d22b0499f /drivers/gpu/nvgpu/gk20a/channel_gk20a.c
parent6839341bf8ffafa115cfc0427bba694ee1d131f3 (diff)
gpu: nvgpu: Use sysmem aperture for SoC memory
In Tegra GPU, SoC memory has to be accessed as vidmem. In discrete GPU, it has to be accessed as sysmem. Change-Id: I4efe71b54a9a32f0bf1f02ec4016ed74405a14c5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1120468
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_gk20a.c')
-rw-r--r--drivers/gpu/nvgpu/gk20a/channel_gk20a.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
index e8d82e0e..b7bccd07 100644
--- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c
@@ -130,6 +130,7 @@ static int channel_gk20a_commit_userd(struct channel_gk20a *c)
130 u32 addr_lo; 130 u32 addr_lo;
131 u32 addr_hi; 131 u32 addr_hi;
132 void *inst_ptr; 132 void *inst_ptr;
133 struct gk20a *g = c->g;
133 134
134 gk20a_dbg_fn(""); 135 gk20a_dbg_fn("");
135 136
@@ -144,12 +145,13 @@ static int channel_gk20a_commit_userd(struct channel_gk20a *c)
144 c->hw_chid, (u64)c->userd_iova); 145 c->hw_chid, (u64)c->userd_iova);
145 146
146 gk20a_mem_wr32(inst_ptr, ram_in_ramfc_w() + ram_fc_userd_w(), 147 gk20a_mem_wr32(inst_ptr, ram_in_ramfc_w() + ram_fc_userd_w(),
147 pbdma_userd_target_vid_mem_f() | 148 (g->mm.vidmem_is_vidmem ?
148 pbdma_userd_addr_f(addr_lo)); 149 pbdma_userd_target_sys_mem_ncoh_f() :
150 pbdma_userd_target_vid_mem_f()) |
151 pbdma_userd_addr_f(addr_lo));
149 152
150 gk20a_mem_wr32(inst_ptr, ram_in_ramfc_w() + ram_fc_userd_hi_w(), 153 gk20a_mem_wr32(inst_ptr, ram_in_ramfc_w() + ram_fc_userd_hi_w(),
151 pbdma_userd_target_vid_mem_f() | 154 pbdma_userd_hi_addr_f(addr_hi));
152 pbdma_userd_hi_addr_f(addr_hi));
153 155
154 return 0; 156 return 0;
155} 157}
@@ -354,7 +356,9 @@ static void channel_gk20a_bind(struct channel_gk20a *c)
354 356
355 gk20a_writel(g, ccsr_channel_inst_r(c->hw_chid), 357 gk20a_writel(g, ccsr_channel_inst_r(c->hw_chid),
356 ccsr_channel_inst_ptr_f(inst_ptr) | 358 ccsr_channel_inst_ptr_f(inst_ptr) |
357 ccsr_channel_inst_target_vid_mem_f() | 359 (g->mm.vidmem_is_vidmem ?
360 ccsr_channel_inst_target_sys_mem_ncoh_f() :
361 ccsr_channel_inst_target_vid_mem_f()) |
358 ccsr_channel_inst_bind_true_f()); 362 ccsr_channel_inst_bind_true_f());
359 363
360 gk20a_writel(g, ccsr_channel_r(c->hw_chid), 364 gk20a_writel(g, ccsr_channel_r(c->hw_chid),