diff options
author | Konsta Holtta <kholtta@nvidia.com> | 2015-01-14 07:02:23 -0500 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-04-04 21:04:35 -0400 |
commit | 2dda8077ec7d88ac689b57448031a3bac269fdfa (patch) | |
tree | 9513c040114e286ddb0fed68a667d13eaf3a4491 /drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |
parent | d29be09f6f4fa9aa4a41ecbb45eaa906b43319e9 (diff) |
gpu: nvgpu: unify instance block initialization
Create gk20a_init_inst_block() to reduce reg write clutter when
initializing instance blocks, which is done in several places.
Change-Id: Idcb8b604851a849e0bb6abce5743c9f4cbf98033
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/672434
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/channel_gk20a.c')
-rw-r--r-- | drivers/gpu/nvgpu/gk20a/channel_gk20a.c | 34 |
1 files changed, 3 insertions, 31 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c index 6573d9ca..80cddb32 100644 --- a/drivers/gpu/nvgpu/gk20a/channel_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/channel_gk20a.c | |||
@@ -87,41 +87,13 @@ static void release_used_channel(struct fifo_gk20a *f, struct channel_gk20a *c) | |||
87 | 87 | ||
88 | int channel_gk20a_commit_va(struct channel_gk20a *c) | 88 | int channel_gk20a_commit_va(struct channel_gk20a *c) |
89 | { | 89 | { |
90 | u64 addr; | ||
91 | u32 addr_lo; | ||
92 | u32 addr_hi; | ||
93 | void *inst_ptr; | ||
94 | |||
95 | gk20a_dbg_fn(""); | 90 | gk20a_dbg_fn(""); |
96 | 91 | ||
97 | inst_ptr = c->inst_block.cpuva; | 92 | if (!c->inst_block.cpuva) |
98 | if (!inst_ptr) | ||
99 | return -ENOMEM; | 93 | return -ENOMEM; |
100 | 94 | ||
101 | addr = gk20a_mm_iova_addr(c->g, c->vm->pdes.sgt->sgl); | 95 | gk20a_init_inst_block(&c->inst_block, c->vm, |
102 | addr_lo = u64_lo32(addr >> 12); | 96 | c->vm->gmmu_page_sizes[gmmu_page_size_big]); |
103 | addr_hi = u64_hi32(addr); | ||
104 | |||
105 | gk20a_dbg_info("pde pa=0x%llx addr_lo=0x%x addr_hi=0x%x", | ||
106 | (u64)addr, addr_lo, addr_hi); | ||
107 | |||
108 | gk20a_mem_wr32(inst_ptr, ram_in_page_dir_base_lo_w(), | ||
109 | ram_in_page_dir_base_target_vid_mem_f() | | ||
110 | ram_in_page_dir_base_vol_true_f() | | ||
111 | ram_in_page_dir_base_lo_f(addr_lo)); | ||
112 | |||
113 | gk20a_mem_wr32(inst_ptr, ram_in_page_dir_base_hi_w(), | ||
114 | ram_in_page_dir_base_hi_f(addr_hi)); | ||
115 | |||
116 | gk20a_mem_wr32(inst_ptr, ram_in_adr_limit_lo_w(), | ||
117 | u64_lo32(c->vm->va_limit) | 0xFFF); | ||
118 | |||
119 | gk20a_mem_wr32(inst_ptr, ram_in_adr_limit_hi_w(), | ||
120 | ram_in_adr_limit_hi_f(u64_hi32(c->vm->va_limit))); | ||
121 | |||
122 | if (c->g->ops.mm.set_big_page_size) | ||
123 | c->g->ops.mm.set_big_page_size(c->g, inst_ptr, | ||
124 | c->vm->gmmu_page_sizes[gmmu_page_size_big]); | ||
125 | 97 | ||
126 | return 0; | 98 | return 0; |
127 | } | 99 | } |