gpu: nvgpu: pass pid/tid from os specific code to common code

linux driver runs in user's process but qnx driver has dedicate driver
process, so they have different way to get user pid. nvgpu common code
expect calls from os specific code pass pid/tid.

ce/cde open channel for internal use, we use driver pid.

Jira VQRM-3534

Change-Id: I892372ac5f1dc4d25f9928d16992bcc659d12a56
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1694145
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 5 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
index 87eff813..6da65abd 100644
--- a/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
@@ -1,7 +1,7 @@
 /*
  * GK20A Graphics Copy Engine  (gr host)
  *
- * Copyright (c) 2011-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -24,6 +24,7 @@
 
 #include <nvgpu/kmem.h>
 #include <nvgpu/dma.h>
+#include <nvgpu/os_sched.h>
 
 #include "gk20a.h"
 
@@ -430,7 +431,7 @@ u32 gk20a_ce_create_context(struct gk20a *g,
         ce_ctx->vm = g->mm.ce.vm;
 
         /* allocate a tsg if needed */
-        ce_ctx->tsg = gk20a_tsg_open(g);
+        ce_ctx->tsg = gk20a_tsg_open(g, nvgpu_current_pid(g));
         if (!ce_ctx->tsg) {
                 nvgpu_err(g, "ce: gk20a tsg not available");
                 err = -ENOMEM;
@@ -438,7 +439,8 @@ u32 gk20a_ce_create_context(struct gk20a *g,
         }
 
         /* always kernel client needs privileged channel */
-        ce_ctx->ch = gk20a_open_new_channel(g, runlist_id, true);
+        ce_ctx->ch = gk20a_open_new_channel(g, runlist_id, true,
+                                nvgpu_current_pid(g), nvgpu_current_tid(g));
         if (!ce_ctx->ch) {
                 nvgpu_err(g, "ce: gk20a channel not available");
                 err = -ENOMEM;