diff options
| author | sujeet baranwal <sbaranwal@nvidia.com> | 2015-09-22 11:56:13 -0400 |
|---|---|---|
| committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2015-09-24 10:53:43 -0400 |
| commit | 6ceef08d52daabdf4911f28086e082b1dd2559f1 (patch) | |
| tree | abe98d12cf6d0b94a8f5af8d4d267d8eea7c7cc4 /drivers/gpu/nvgpu/gk20a/cde_gk20a.c | |
| parent | 977acd877b68b51eb2f48a999077939378968c66 (diff) | |
gpu: nvgpu: Add CDE bits in FECS header
In case of CDE channel, T1 (Tex) unit needs to be promoted to 128B
aligned, otherwise causes a HW deadlock. Gpu driver makes changes in
FECS header which FECS uses to configure the T1 promotions to aligned
128B accesses.
Bug 200096226
Change-Id: Ic006b2c7035bbeabe1081aeed968a6c6d11f9995
Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com>
Reviewed-on: http://git-master/r/802327
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gk20a/cde_gk20a.c')
| -rw-r--r-- | drivers/gpu/nvgpu/gk20a/cde_gk20a.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c index 84b39b2d..f148c65a 100644 --- a/drivers/gpu/nvgpu/gk20a/cde_gk20a.c +++ b/drivers/gpu/nvgpu/gk20a/cde_gk20a.c | |||
| @@ -487,6 +487,9 @@ static int gk20a_init_cde_required_class(struct gk20a_cde_ctx *cde_ctx, | |||
| 487 | alloc_obj_ctx.class_num = required_class; | 487 | alloc_obj_ctx.class_num = required_class; |
| 488 | alloc_obj_ctx.flags = 0; | 488 | alloc_obj_ctx.flags = 0; |
| 489 | 489 | ||
| 490 | /* CDE enabled */ | ||
| 491 | cde_ctx->ch->cde = true; | ||
| 492 | |||
| 490 | err = gk20a_alloc_obj_ctx(cde_ctx->ch, &alloc_obj_ctx); | 493 | err = gk20a_alloc_obj_ctx(cde_ctx->ch, &alloc_obj_ctx); |
| 491 | if (err) { | 494 | if (err) { |
| 492 | gk20a_warn(&cde_ctx->pdev->dev, "cde: failed to allocate ctx. err=%d", | 495 | gk20a_warn(&cde_ctx->pdev->dev, "cde: failed to allocate ctx. err=%d", |