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authorKonsta Holtta <kholtta@nvidia.com>2016-09-12 04:59:21 -0400
committerDeepak Nibade <dnibade@nvidia.com>2016-12-27 04:56:19 -0500
commitf107ff488c8f1ccd225cdd4c40c82f79c45136c7 (patch)
treebcc99c288ece9c716f8fdf2abf5b6c3d6a787cb7 /drivers/gpu/nvgpu/ctrl
parentbb6923908a2873b079ad67d22c9fcb014c00af28 (diff)
gpu: nvgpu: fix pde0 target bit programming
Use entry->mem for determining the target aperture bits of the memory block represented by entry->mem in update_gmmu_pde0_locked(), instead of pte->mem that holds the parent memory where this bit is written to. Previously this has worked because all page tables have been in the same aperture, but really large userspace allocations may push a part of them suddendly to sysmem. Bug 1809939 Change-Id: I3372487c6ae9793018ce44552ded3fb1ba4d145a Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1218636 (cherry picked from commit a92596f6e8e621e51b6afae9ab7e62044d6311eb) Reviewed-on: http://git-master/r/1220525 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/ctrl')
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