nvgpu: ctrl: MISRA Rule 21.2 header guard fixes

MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in ctrl by renaming
them to follow the convention, 'NVGPU_PARENT-DIR_HEADER-NAME' when
there is no keyword repetition between file name and directory or
'NVGPU_HEADER-NAME' when there is repetition.

JIRA NVGPU-1028

Change-Id: Ia7e5bf76dd2a8689e365bdeb27eac4b6e9ca4cfd
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1815657
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

7 files changed, 24 insertions, 25 deletions

diff --git a/drivers/gpu/nvgpu/ctrl/ctrlboardobj.h b/drivers/gpu/nvgpu/ctrl/ctrlboardobj.h
index 5941e2e6..9e4402a5 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrlboardobj.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrlboardobj.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _ctrlboardobj_h_
-#define _ctrlboardobj_h_
+#ifndef NVGPU_CTRLBOARDOBJ_H
+#define NVGPU_CTRLBOARDOBJ_H
 
 struct ctrl_boardobj {
         u8    type;
@@ -86,5 +86,4 @@ struct ctrl_boardobjgrp {
         u32    obj_mask;
 };
 
-#endif
-
+#endif /* NVGPU_CTRLBOARDOBJ_H */
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlclk.h b/drivers/gpu/nvgpu/ctrl/ctrlclk.h
index 09a7e1ce..fbd56770 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrlclk.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrlclk.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _ctrlclk_h_
-#define _ctrlclk_h_
+#ifndef NVGPU_CTRLCLK_H
+#define NVGPU_CTRLCLK_H
 
 #include "ctrlboardobj.h"
 #include "ctrlclkavfs.h"
@@ -209,4 +209,4 @@ struct ctrl_clk_clk_domain_list {
 #define CTRL_CLK_VF_PAIR_VOLTAGE_UV_SET(pvfpair, _voltageuv)            \
         (((pvfpair)->voltage_uv) = (_voltageuv))
 
-#endif
+#endif /* NVGPU_CTRLCLK_H */
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h b/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h
index 5b757cbf..b01e4ffa 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrlclkavfs.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _ctrlclkavfs_h_
-#define _ctrlclkavfs_h_
+#ifndef NVGPU_CTRLCLKAVFS_H
+#define NVGPU_CTRLCLKAVFS_H
 
 #include "ctrlboardobj.h"
 /*!
@@ -107,4 +107,4 @@
 #define CTRL_CLK_FLL_LUT_VSELECT_LOGIC                     (0x00000000)
 #define CTRL_CLK_FLL_LUT_VSELECT_MIN                       (0x00000001)
 #define CTRL_CLK_FLL_LUT_VSELECT_SRAM                      (0x00000002)
-#endif
+#endif /* NVGPU_CTRLCLKAVFS_H */
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlperf.h b/drivers/gpu/nvgpu/ctrl/ctrlperf.h
index 477b33d8..2928cad1 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrlperf.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrlperf.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _ctrlperf_h_
-#define _ctrlperf_h_
+#ifndef NVGPU_CTRLPERF_H
+#define NVGPU_CTRLPERF_H
 
 struct ctrl_perf_volt_rail_list_item {
         u8 volt_domain;
@@ -100,4 +100,4 @@ struct ctrl_perf_vfe_var_single_sensed_fuse_ver_vfield_info {
         bool b_use_default_on_ver_check_fail;
         u8 v_field_id_ver;
 };
-#endif
+#endif /* NVGPU_CTRLPERF_H */
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h b/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h
index 75085fc3..165bbd5d 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrlpmgr.h
@@ -1,7 +1,7 @@
 /*
  * Control pmgr state infrastructure
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _ctrlpmgr_h_
-#define _ctrlpmgr_h_
+#ifndef NVGPU_CTRLPMGR_H
+#define NVGPU_CTRLPMGR_H
 
 #include "ctrlboardobj.h"
 
@@ -95,4 +95,4 @@ struct ctrl_pmgr_pwr_policy_limit_arbitration {
                 inputs[CTRL_PMGR_PWR_POLICY_MAX_LIMIT_INPUTS];
 };
 
-#endif
+#endif /* NVGPU_CTRLPMGR_H */
diff --git a/drivers/gpu/nvgpu/ctrl/ctrltherm.h b/drivers/gpu/nvgpu/ctrl/ctrltherm.h
index 4491d364..27af7b04 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrltherm.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrltherm.h
@@ -1,7 +1,7 @@
 /*
  * Control thermal infrastructure
  *
- * Copyright (c) 2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2016-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _ctrltherm_h_
-#define _ctrltherm_h_
+#ifndef NVGPU_CTRLTHERM_H
+#define NVGPU_CTRLTHERM_H
 
 #include "ctrlboardobj.h"
 
@@ -30,4 +30,4 @@
 
 #define CTRL_THERMAL_THERM_CHANNEL_CLASS_DEVICE                         0x01
 
-#endif
+#endif /* NVGPU_CTRLTHERM_H */
diff --git a/drivers/gpu/nvgpu/ctrl/ctrlvolt.h b/drivers/gpu/nvgpu/ctrl/ctrlvolt.h
index dcb8c8ea..ea06dbc4 100644
--- a/drivers/gpu/nvgpu/ctrl/ctrlvolt.h
+++ b/drivers/gpu/nvgpu/ctrl/ctrlvolt.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef _ctrlvolt_h_
-#define _ctrlvolt_h_
+#ifndef NVGPU_CTRLVOLT_H
+#define NVGPU_CTRLVOLT_H
 
 #define CTRL_VOLT_VOLT_RAIL_MAX_RAILS   \
         CTRL_BOARDOBJGRP_E32_MAX_OBJECTS
@@ -140,4 +140,4 @@ struct ctrl_volt_volt_rail_list_v1 {
                 rails[CTRL_VOLT_VOLT_RAIL_MAX_RAILS];
 };
 
-#endif
+#endif /* NVGPU_CTRLVOLT_H */