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| author | Vinod G <vinodg@nvidia.com> | 2018-05-24 17:00:19 -0400 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-08-08 07:27:28 -0400 |
| commit | a09b9cd587d27a3ef6479a17631c3497d447e7a9 (patch) | |
| tree | df543902311f6c0e87458041e13b9f569fc92318 /drivers/gpu/nvgpu/ctrl/ctrlvolt.h | |
| parent | 32bcf21f5712fcd872b26ec70ad8987f7db4478f (diff) | |
gpu: nvgpu: Add IOCTL for SM_EXCEPTION_TYPE_MASK
Add new ioctl to set the SM_EXCEPTION_TYPE_MASK is
added to dbg session.
Currently support SM_EXCEPTION_TYPE_MASK_FATAL type
If this type is set then the code will skip RC recovery,
instead trigger CILP preemption.
bug 200412641
JIRA NVGPU-702
Change-Id: I4b1f18379ee792cd324ccc555939e0f4f5c9e3b4
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1729792
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/ctrl/ctrlvolt.h')
0 files changed, 0 insertions, 0 deletions