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| author | Lakshmanan M <lm@nvidia.com> | 2016-06-15 00:53:43 -0400 |
|---|---|---|
| committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:56:17 -0500 |
| commit | 39f3a8b89fbd7589bb911d64f894c0c7d56fb694 (patch) | |
| tree | 7594ade644c6f0d25540f80562c4eb4ceadcae58 /drivers/gpu/nvgpu/ctrl/ctrlvolt.h | |
| parent | a445c27d5bb2989f6865b5c267b22c9edbe6cc31 (diff) | |
gpu: nvgpu: Add fifo conf support for gp10x
Added fifo configuration support for gp104 and
gp106. These GPU chips have more number of
channel fifo and runlist than gp10b.
Added get_num_fifos and
eng_runlist_base_size function pointer
to find out the actual value from HW headers.
JIRA DNVGPU-25
Change-Id: I2322a6354eaa2af2b2605f3e9eedebf9827c7dda
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1164653
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/ctrl/ctrlvolt.h')
0 files changed, 0 insertions, 0 deletions