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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-11 16:02:26 -0400 |
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committer | Deepak Nibade <dnibade@nvidia.com> | 2016-12-27 04:52:12 -0500 |
commit | 2c939d35bb07b9ab6643c301efd63e65fc29ed46 (patch) | |
tree | b1cb2e7e58bab91021c0191f76a3ef0468c8f99c /drivers/gpu/nvgpu/ctrl/ctrlvolt.h | |
parent | ae893b37c014b13f68aa7547640bda3589363f4d (diff) |
gpu: nvgpu: gp10b: Wait for BAR1 bind
Wait for BAR1 bind to complete before continuing. The register to
wait exists Maxwell onwards.
Change-Id: Icf03ae66aeb265808c4ba8da24ba4e1ebb91564e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1123939
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/ctrl/ctrlvolt.h')
0 files changed, 0 insertions, 0 deletions