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| author | Deepak Nibade <dnibade@nvidia.com> | 2016-12-06 04:33:08 -0500 |
|---|---|---|
| committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-12-21 11:45:59 -0500 |
| commit | 145225b896bd43a918280de27260ba5a315751c8 (patch) | |
| tree | 5eb9bfba7eff0aa808d66cce81abf19924a3f054 /drivers/gpu/nvgpu/ctrl/ctrlpmgr.h | |
| parent | 34d8421ab4e9ecd0af09f7fefe71b9a1d8781061 (diff) | |
gpu: nvgpu: remove clk writel from TPC FS
To floorsweep any TPC on gm20b, we first have to
set BIT(28) in CLK_RST_CONTROLLER_MISC_CLK_ENB_0
from nvgpu driver
But now this bit is set by default from clock
driver, hence remove clk_writel() from nvgpu
driver
Bug 200262155
Change-Id: I65bc60cb017109bdb882d83637f2a06d27586f18
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1265752
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/ctrl/ctrlpmgr.h')
0 files changed, 0 insertions, 0 deletions