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authorDeepak Nibade <dnibade@nvidia.com>2017-11-24 03:08:06 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-11-27 04:49:28 -0500
commitfda4f49f393d94ff34ccf4e714caf2795229a75a (patch)
tree0c64d5eac066a4e05b93cbd718d6f885c7aecd06 /drivers/gpu/nvgpu/common
parent6194cfdef52afcb17aa2921685f370e4c5d27819 (diff)
gpu: nvgpu: move gv11b platform specific file to linux
gv11b/platform_gv11b_tegra.c is mostly linux specific so move it to linux specific directory Change-Id: I3e10bafcf672967e35a7955038cd9285b8697a57 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1604283 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common')
-rw-r--r--drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c544
1 files changed, 544 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c
new file mode 100644
index 00000000..3c6eac77
--- /dev/null
+++ b/drivers/gpu/nvgpu/common/linux/platform_gv11b_tegra.c
@@ -0,0 +1,544 @@
1/*
2 * GV11B Tegra Platform Interface
3 *
4 * Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/of_platform.h>
20#include <linux/debugfs.h>
21#include <linux/dma-buf.h>
22#include <linux/nvmap.h>
23#include <linux/reset.h>
24#include <linux/hashtable.h>
25#include <linux/clk.h>
26
27#include <nvgpu/nvhost.h>
28#include <nvgpu/nvhost_t19x.h>
29
30#include <uapi/linux/nvgpu.h>
31
32#include <soc/tegra/tegra_bpmp.h>
33#include <soc/tegra/tegra_powergate.h>
34
35#include "gk20a/gk20a.h"
36#include "platform_gk20a.h"
37#include "clk.h"
38
39#include "gp10b/platform_gp10b.h"
40#include "platform_gp10b_tegra.h"
41
42#include "os_linux.h"
43#include "platform_gk20a_tegra.h"
44#include "gv11b/gr_gv11b.h"
45#include "nvgpu_gpuid_t19x.h"
46
47static void gr_gv11b_remove_sysfs(struct device *dev);
48
49static int gv11b_tegra_probe(struct device *dev)
50{
51 struct gk20a_platform *platform = dev_get_drvdata(dev);
52#ifdef CONFIG_TEGRA_GK20A_NVHOST
53 struct gk20a *g = platform->g;
54 int err = 0;
55
56 err = nvgpu_get_nvhost_dev(g);
57 if (err) {
58 dev_err(dev, "host1x device not available");
59 return err;
60 }
61
62 err = nvgpu_nvhost_syncpt_unit_interface_get_aperture(
63 g->nvhost_dev,
64 &g->syncpt_unit_base,
65 &g->syncpt_unit_size);
66 if (err) {
67 dev_err(dev, "Failed to get syncpt interface");
68 return -ENOSYS;
69 }
70 g->syncpt_size = nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(1);
71 gk20a_dbg_info("syncpt_unit_base %llx syncpt_unit_size %zx size %x\n",
72 g->syncpt_unit_base, g->syncpt_unit_size,
73 g->syncpt_size);
74#endif
75
76 platform->bypass_smmu = !device_is_iommuable(dev);
77 platform->disable_bigpage = platform->bypass_smmu;
78
79 platform->g->gr.ctx_vars.dump_ctxsw_stats_on_channel_close
80 = false;
81 platform->g->gr.ctx_vars.dump_ctxsw_stats_on_channel_close
82 = false;
83
84 platform->g->gr.ctx_vars.force_preemption_gfxp = false;
85 platform->g->gr.ctx_vars.force_preemption_cilp = false;
86
87 gp10b_tegra_get_clocks(dev);
88 nvgpu_linux_init_clk_support(platform->g);
89
90 return 0;
91}
92
93static int gv11b_tegra_remove(struct device *dev)
94{
95 gp10b_tegra_remove(dev);
96
97 gr_gv11b_remove_sysfs(dev);
98
99 return 0;
100}
101
102static bool gv11b_tegra_is_railgated(struct device *dev)
103{
104 bool ret = false;
105#ifdef TEGRA194_POWER_DOMAIN_GPU
106 struct gk20a *g = get_gk20a(dev);
107
108 if (tegra_bpmp_running()) {
109 nvgpu_log(g, gpu_dbg_info, "bpmp running");
110 ret = !tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU);
111
112 nvgpu_log(g, gpu_dbg_info, "railgated? %s", ret ? "yes" : "no");
113 } else {
114 nvgpu_log(g, gpu_dbg_info, "bpmp not running");
115 }
116#endif
117 return ret;
118}
119
120static int gv11b_tegra_railgate(struct device *dev)
121{
122#ifdef TEGRA194_POWER_DOMAIN_GPU
123 struct gk20a_platform *platform = gk20a_get_platform(dev);
124 struct gk20a *g = get_gk20a(dev);
125 int i;
126
127 if (tegra_bpmp_running()) {
128 nvgpu_log(g, gpu_dbg_info, "bpmp running");
129 if (!tegra_powergate_is_powered(TEGRA194_POWER_DOMAIN_GPU)) {
130 nvgpu_log(g, gpu_dbg_info, "powergate is not powered");
131 return 0;
132 }
133 nvgpu_log(g, gpu_dbg_info, "clk_disable_unprepare");
134 for (i = 0; i < platform->num_clks; i++) {
135 if (platform->clk[i])
136 clk_disable_unprepare(platform->clk[i]);
137 }
138 nvgpu_log(g, gpu_dbg_info, "powergate_partition");
139 tegra_powergate_partition(TEGRA194_POWER_DOMAIN_GPU);
140 } else {
141 nvgpu_log(g, gpu_dbg_info, "bpmp not running");
142 }
143#endif
144 return 0;
145}
146
147static int gv11b_tegra_unrailgate(struct device *dev)
148{
149 int ret = 0;
150#ifdef TEGRA194_POWER_DOMAIN_GPU
151 struct gk20a_platform *platform = gk20a_get_platform(dev);
152 struct gk20a *g = get_gk20a(dev);
153 int i;
154
155 if (tegra_bpmp_running()) {
156 nvgpu_log(g, gpu_dbg_info, "bpmp running");
157 ret = tegra_unpowergate_partition(TEGRA194_POWER_DOMAIN_GPU);
158 if (ret) {
159 nvgpu_log(g, gpu_dbg_info,
160 "unpowergate partition failed");
161 return ret;
162 }
163 nvgpu_log(g, gpu_dbg_info, "clk_prepare_enable");
164 for (i = 0; i < platform->num_clks; i++) {
165 if (platform->clk[i])
166 clk_prepare_enable(platform->clk[i]);
167 }
168 } else {
169 nvgpu_log(g, gpu_dbg_info, "bpmp not running");
170 }
171#endif
172 return ret;
173}
174
175static int gv11b_tegra_suspend(struct device *dev)
176{
177 return 0;
178}
179
180struct gk20a_platform t19x_gpu_tegra_platform = {
181 .has_syncpoints = true,
182
183 /* power management configuration */
184
185 /* ptimer src frequency in hz*/
186 .ptimer_src_freq = 31250000,
187
188 .probe = gv11b_tegra_probe,
189 .remove = gv11b_tegra_remove,
190
191 .enable_slcg = false,
192 .enable_blcg = false,
193 .enable_elcg = false,
194 .can_slcg = false,
195 .can_blcg = false,
196 .can_elcg = false,
197
198 /* power management callbacks */
199 .suspend = gv11b_tegra_suspend,
200 .railgate = gv11b_tegra_railgate,
201 .unrailgate = gv11b_tegra_unrailgate,
202 .is_railgated = gv11b_tegra_is_railgated,
203
204 .busy = gk20a_tegra_busy,
205 .idle = gk20a_tegra_idle,
206
207 .dump_platform_dependencies = gk20a_tegra_debug_dump,
208
209 .soc_name = "tegra19x",
210
211 .honors_aperture = true,
212 .unified_memory = true,
213
214 .reset_assert = gp10b_tegra_reset_assert,
215 .reset_deassert = gp10b_tegra_reset_deassert,
216};
217
218static struct device_attribute *dev_attr_sm_l1_tag_ecc_corrected_err_count_array;
219static struct device_attribute *dev_attr_sm_l1_tag_ecc_uncorrected_err_count_array;
220static struct device_attribute *dev_attr_sm_cbu_ecc_corrected_err_count_array;
221static struct device_attribute *dev_attr_sm_cbu_ecc_uncorrected_err_count_array;
222static struct device_attribute *dev_attr_sm_l1_data_ecc_corrected_err_count_array;
223static struct device_attribute *dev_attr_sm_l1_data_ecc_uncorrected_err_count_array;
224static struct device_attribute *dev_attr_sm_icache_ecc_corrected_err_count_array;
225static struct device_attribute *dev_attr_sm_icache_ecc_uncorrected_err_count_array;
226static struct device_attribute *dev_attr_gcc_l15_ecc_corrected_err_count_array;
227static struct device_attribute *dev_attr_gcc_l15_ecc_uncorrected_err_count_array;
228static struct device_attribute *dev_attr_mmu_l1tlb_ecc_corrected_err_count_array;
229static struct device_attribute *dev_attr_mmu_l1tlb_ecc_uncorrected_err_count_array;
230
231static struct device_attribute *dev_attr_fecs_ecc_corrected_err_count_array;
232static struct device_attribute *dev_attr_fecs_ecc_uncorrected_err_count_array;
233static struct device_attribute *dev_attr_gpccs_ecc_corrected_err_count_array;
234static struct device_attribute *dev_attr_gpccs_ecc_uncorrected_err_count_array;
235
236static struct device_attribute *dev_attr_l2_cache_ecc_corrected_err_count_array;
237static struct device_attribute *dev_attr_l2_cache_ecc_uncorrected_err_count_array;
238
239static struct device_attribute *dev_attr_mmu_l2tlb_ecc_corrected_err_count_array;
240static struct device_attribute *dev_attr_mmu_l2tlb_ecc_uncorrected_err_count_array;
241static struct device_attribute *dev_attr_mmu_hubtlb_ecc_corrected_err_count_array;
242static struct device_attribute *dev_attr_mmu_hubtlb_ecc_uncorrected_err_count_array;
243static struct device_attribute *dev_attr_mmu_fillunit_ecc_corrected_err_count_array;
244static struct device_attribute *dev_attr_mmu_fillunit_ecc_uncorrected_err_count_array;
245
246void gr_gv11b_create_sysfs(struct gk20a *g)
247{
248 struct device *dev = dev_from_gk20a(g);
249 int error = 0;
250 /* This stat creation function is called on GR init. GR can get
251 initialized multiple times but we only need to create the ECC
252 stats once. Therefore, add the following check to avoid
253 creating duplicate stat sysfs nodes. */
254 if (g->ecc.gr.t19x.sm_l1_tag_corrected_err_count.counters != NULL)
255 return;
256
257 gr_gp10b_create_sysfs(g);
258
259 error |= gr_gp10b_ecc_stat_create(dev,
260 0,
261 "sm_l1_tag_ecc_corrected_err_count",
262 &g->ecc.gr.t19x.sm_l1_tag_corrected_err_count,
263 &dev_attr_sm_l1_tag_ecc_corrected_err_count_array);
264
265 error |= gr_gp10b_ecc_stat_create(dev,
266 0,
267 "sm_l1_tag_ecc_uncorrected_err_count",
268 &g->ecc.gr.t19x.sm_l1_tag_uncorrected_err_count,
269 &dev_attr_sm_l1_tag_ecc_uncorrected_err_count_array);
270
271 error |= gr_gp10b_ecc_stat_create(dev,
272 0,
273 "sm_cbu_ecc_corrected_err_count",
274 &g->ecc.gr.t19x.sm_cbu_corrected_err_count,
275 &dev_attr_sm_cbu_ecc_corrected_err_count_array);
276
277 error |= gr_gp10b_ecc_stat_create(dev,
278 0,
279 "sm_cbu_ecc_uncorrected_err_count",
280 &g->ecc.gr.t19x.sm_cbu_uncorrected_err_count,
281 &dev_attr_sm_cbu_ecc_uncorrected_err_count_array);
282
283 error |= gr_gp10b_ecc_stat_create(dev,
284 0,
285 "sm_l1_data_ecc_corrected_err_count",
286 &g->ecc.gr.t19x.sm_l1_data_corrected_err_count,
287 &dev_attr_sm_l1_data_ecc_corrected_err_count_array);
288
289 error |= gr_gp10b_ecc_stat_create(dev,
290 0,
291 "sm_l1_data_ecc_uncorrected_err_count",
292 &g->ecc.gr.t19x.sm_l1_data_uncorrected_err_count,
293 &dev_attr_sm_l1_data_ecc_uncorrected_err_count_array);
294
295 error |= gr_gp10b_ecc_stat_create(dev,
296 0,
297 "sm_icache_ecc_corrected_err_count",
298 &g->ecc.gr.t19x.sm_icache_corrected_err_count,
299 &dev_attr_sm_icache_ecc_corrected_err_count_array);
300
301 error |= gr_gp10b_ecc_stat_create(dev,
302 0,
303 "sm_icache_ecc_uncorrected_err_count",
304 &g->ecc.gr.t19x.sm_icache_uncorrected_err_count,
305 &dev_attr_sm_icache_ecc_uncorrected_err_count_array);
306
307 error |= gr_gp10b_ecc_stat_create(dev,
308 0,
309 "gcc_l15_ecc_corrected_err_count",
310 &g->ecc.gr.t19x.gcc_l15_corrected_err_count,
311 &dev_attr_gcc_l15_ecc_corrected_err_count_array);
312
313 error |= gr_gp10b_ecc_stat_create(dev,
314 0,
315 "gcc_l15_ecc_uncorrected_err_count",
316 &g->ecc.gr.t19x.gcc_l15_uncorrected_err_count,
317 &dev_attr_gcc_l15_ecc_uncorrected_err_count_array);
318
319 error |= gp10b_ecc_stat_create(dev,
320 g->ltc_count,
321 "ltc",
322 "l2_cache_uncorrected_err_count",
323 &g->ecc.ltc.t19x.l2_cache_uncorrected_err_count,
324 &dev_attr_l2_cache_ecc_uncorrected_err_count_array);
325
326 error |= gp10b_ecc_stat_create(dev,
327 g->ltc_count,
328 "ltc",
329 "l2_cache_corrected_err_count",
330 &g->ecc.ltc.t19x.l2_cache_corrected_err_count,
331 &dev_attr_l2_cache_ecc_corrected_err_count_array);
332
333 error |= gp10b_ecc_stat_create(dev,
334 1,
335 "gpc",
336 "fecs_ecc_uncorrected_err_count",
337 &g->ecc.gr.t19x.fecs_uncorrected_err_count,
338 &dev_attr_fecs_ecc_uncorrected_err_count_array);
339
340 error |= gp10b_ecc_stat_create(dev,
341 1,
342 "gpc",
343 "fecs_ecc_corrected_err_count",
344 &g->ecc.gr.t19x.fecs_corrected_err_count,
345 &dev_attr_fecs_ecc_corrected_err_count_array);
346
347 error |= gp10b_ecc_stat_create(dev,
348 g->gr.gpc_count,
349 "gpc",
350 "gpccs_ecc_uncorrected_err_count",
351 &g->ecc.gr.t19x.gpccs_uncorrected_err_count,
352 &dev_attr_gpccs_ecc_uncorrected_err_count_array);
353
354 error |= gp10b_ecc_stat_create(dev,
355 g->gr.gpc_count,
356 "gpc",
357 "gpccs_ecc_corrected_err_count",
358 &g->ecc.gr.t19x.gpccs_corrected_err_count,
359 &dev_attr_gpccs_ecc_corrected_err_count_array);
360
361 error |= gp10b_ecc_stat_create(dev,
362 g->gr.gpc_count,
363 "gpc",
364 "mmu_l1tlb_ecc_uncorrected_err_count",
365 &g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count,
366 &dev_attr_mmu_l1tlb_ecc_uncorrected_err_count_array);
367
368 error |= gp10b_ecc_stat_create(dev,
369 g->gr.gpc_count,
370 "gpc",
371 "mmu_l1tlb_ecc_corrected_err_count",
372 &g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count,
373 &dev_attr_mmu_l1tlb_ecc_corrected_err_count_array);
374
375 error |= gp10b_ecc_stat_create(dev,
376 1,
377 "eng",
378 "mmu_l2tlb_ecc_uncorrected_err_count",
379 &g->ecc.eng.t19x.mmu_l2tlb_uncorrected_err_count,
380 &dev_attr_mmu_l2tlb_ecc_uncorrected_err_count_array);
381
382 error |= gp10b_ecc_stat_create(dev,
383 1,
384 "eng",
385 "mmu_l2tlb_ecc_corrected_err_count",
386 &g->ecc.eng.t19x.mmu_l2tlb_corrected_err_count,
387 &dev_attr_mmu_l2tlb_ecc_corrected_err_count_array);
388
389 error |= gp10b_ecc_stat_create(dev,
390 1,
391 "eng",
392 "mmu_hubtlb_ecc_uncorrected_err_count",
393 &g->ecc.eng.t19x.mmu_hubtlb_uncorrected_err_count,
394 &dev_attr_mmu_hubtlb_ecc_uncorrected_err_count_array);
395
396 error |= gp10b_ecc_stat_create(dev,
397 1,
398 "eng",
399 "mmu_hubtlb_ecc_corrected_err_count",
400 &g->ecc.eng.t19x.mmu_hubtlb_corrected_err_count,
401 &dev_attr_mmu_hubtlb_ecc_corrected_err_count_array);
402
403 error |= gp10b_ecc_stat_create(dev,
404 1,
405 "eng",
406 "mmu_fillunit_ecc_uncorrected_err_count",
407 &g->ecc.eng.t19x.mmu_fillunit_uncorrected_err_count,
408 &dev_attr_mmu_fillunit_ecc_uncorrected_err_count_array);
409
410 error |= gp10b_ecc_stat_create(dev,
411 1,
412 "eng",
413 "mmu_fillunit_ecc_corrected_err_count",
414 &g->ecc.eng.t19x.mmu_fillunit_corrected_err_count,
415 &dev_attr_mmu_fillunit_ecc_corrected_err_count_array);
416
417 if (error)
418 dev_err(dev, "Failed to create gv11b sysfs attributes!\n");
419}
420
421static void gr_gv11b_remove_sysfs(struct device *dev)
422{
423 struct gk20a *g = get_gk20a(dev);
424
425 gr_gp10b_ecc_stat_remove(dev,
426 0,
427 &g->ecc.gr.t19x.sm_l1_tag_corrected_err_count,
428 dev_attr_sm_l1_tag_ecc_corrected_err_count_array);
429
430 gr_gp10b_ecc_stat_remove(dev,
431 0,
432 &g->ecc.gr.t19x.sm_l1_tag_uncorrected_err_count,
433 dev_attr_sm_l1_tag_ecc_uncorrected_err_count_array);
434
435 gr_gp10b_ecc_stat_remove(dev,
436 0,
437 &g->ecc.gr.t19x.sm_cbu_corrected_err_count,
438 dev_attr_sm_cbu_ecc_corrected_err_count_array);
439
440 gr_gp10b_ecc_stat_remove(dev,
441 0,
442 &g->ecc.gr.t19x.sm_cbu_uncorrected_err_count,
443 dev_attr_sm_cbu_ecc_uncorrected_err_count_array);
444
445 gr_gp10b_ecc_stat_remove(dev,
446 0,
447 &g->ecc.gr.t19x.sm_l1_data_corrected_err_count,
448 dev_attr_sm_l1_data_ecc_corrected_err_count_array);
449
450 gr_gp10b_ecc_stat_remove(dev,
451 0,
452 &g->ecc.gr.t19x.sm_l1_data_uncorrected_err_count,
453 dev_attr_sm_l1_data_ecc_uncorrected_err_count_array);
454
455 gr_gp10b_ecc_stat_remove(dev,
456 0,
457 &g->ecc.gr.t19x.sm_icache_corrected_err_count,
458 dev_attr_sm_icache_ecc_corrected_err_count_array);
459
460 gr_gp10b_ecc_stat_remove(dev,
461 0,
462 &g->ecc.gr.t19x.sm_icache_uncorrected_err_count,
463 dev_attr_sm_icache_ecc_uncorrected_err_count_array);
464
465 gr_gp10b_ecc_stat_remove(dev,
466 0,
467 &g->ecc.gr.t19x.gcc_l15_corrected_err_count,
468 dev_attr_gcc_l15_ecc_corrected_err_count_array);
469
470 gr_gp10b_ecc_stat_remove(dev,
471 0,
472 &g->ecc.gr.t19x.gcc_l15_uncorrected_err_count,
473 dev_attr_gcc_l15_ecc_uncorrected_err_count_array);
474
475 gp10b_ecc_stat_remove(dev,
476 g->ltc_count,
477 &g->ecc.ltc.t19x.l2_cache_uncorrected_err_count,
478 dev_attr_l2_cache_ecc_uncorrected_err_count_array);
479
480 gp10b_ecc_stat_remove(dev,
481 g->ltc_count,
482 &g->ecc.ltc.t19x.l2_cache_corrected_err_count,
483 dev_attr_l2_cache_ecc_corrected_err_count_array);
484
485 gp10b_ecc_stat_remove(dev,
486 1,
487 &g->ecc.gr.t19x.fecs_uncorrected_err_count,
488 dev_attr_fecs_ecc_uncorrected_err_count_array);
489
490 gp10b_ecc_stat_remove(dev,
491 1,
492 &g->ecc.gr.t19x.fecs_corrected_err_count,
493 dev_attr_fecs_ecc_corrected_err_count_array);
494
495 gp10b_ecc_stat_remove(dev,
496 g->gr.gpc_count,
497 &g->ecc.gr.t19x.gpccs_uncorrected_err_count,
498 dev_attr_gpccs_ecc_uncorrected_err_count_array);
499
500 gp10b_ecc_stat_remove(dev,
501 g->gr.gpc_count,
502 &g->ecc.gr.t19x.gpccs_corrected_err_count,
503 dev_attr_gpccs_ecc_corrected_err_count_array);
504
505 gp10b_ecc_stat_remove(dev,
506 g->gr.gpc_count,
507 &g->ecc.gr.t19x.mmu_l1tlb_uncorrected_err_count,
508 dev_attr_mmu_l1tlb_ecc_uncorrected_err_count_array);
509
510 gp10b_ecc_stat_remove(dev,
511 g->gr.gpc_count,
512 &g->ecc.gr.t19x.mmu_l1tlb_corrected_err_count,
513 dev_attr_mmu_l1tlb_ecc_corrected_err_count_array);
514
515 gp10b_ecc_stat_remove(dev,
516 1,
517 &g->ecc.eng.t19x.mmu_l2tlb_uncorrected_err_count,
518 dev_attr_mmu_l2tlb_ecc_uncorrected_err_count_array);
519
520 gp10b_ecc_stat_remove(dev,
521 1,
522 &g->ecc.eng.t19x.mmu_l2tlb_corrected_err_count,
523 dev_attr_mmu_l2tlb_ecc_corrected_err_count_array);
524
525 gp10b_ecc_stat_remove(dev,
526 1,
527 &g->ecc.eng.t19x.mmu_hubtlb_uncorrected_err_count,
528 dev_attr_mmu_hubtlb_ecc_uncorrected_err_count_array);
529
530 gp10b_ecc_stat_remove(dev,
531 1,
532 &g->ecc.eng.t19x.mmu_hubtlb_corrected_err_count,
533 dev_attr_mmu_hubtlb_ecc_corrected_err_count_array);
534
535 gp10b_ecc_stat_remove(dev,
536 1,
537 &g->ecc.eng.t19x.mmu_fillunit_uncorrected_err_count,
538 dev_attr_mmu_fillunit_ecc_uncorrected_err_count_array);
539
540 gp10b_ecc_stat_remove(dev,
541 1,
542 &g->ecc.eng.t19x.mmu_fillunit_corrected_err_count,
543 dev_attr_mmu_fillunit_ecc_corrected_err_count_array);
544}