gpu: nvgpu: Move programming of debug page to FB

Debug page was allocated and programmed to HUB MMU in GR code. This
introduces a dependency from GR to FB and is anyway the wrong place.
Move the code to allocate memory to generic MM code, and the code
to program the addresses to FB.

Change-Id: Ib6d3c96efde6794cf5e8cd4c908525c85b57c233
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801423
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 57 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
index 65b7336c..00d0fba4 100644
--- a/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
+++ b/drivers/gpu/nvgpu/common/fb/fb_gm20b.c
@@ -55,9 +55,32 @@ void gm20b_fb_reset(struct gk20a *g)
 
 void gm20b_fb_init_hw(struct gk20a *g)
 {
-        u32 addr = nvgpu_mem_get_addr(g, &g->mm.sysmem_flush) >> 8;
+        u64 addr = nvgpu_mem_get_addr(g, &g->mm.sysmem_flush) >> 8;
 
         gk20a_writel(g, fb_niso_flush_sysmem_addr_r(), addr);
+
+        /* init mmu debug buffer */
+        addr = nvgpu_mem_get_addr(g, &g->mm.mmu_wr_mem);
+        addr >>= fb_mmu_debug_wr_addr_alignment_v();
+
+        gk20a_writel(g, fb_mmu_debug_wr_r(),
+                     nvgpu_aperture_mask(g, &g->mm.mmu_wr_mem,
+                                fb_mmu_debug_wr_aperture_sys_mem_ncoh_f(),
+                                fb_mmu_debug_wr_aperture_sys_mem_coh_f(),
+                                fb_mmu_debug_wr_aperture_vid_mem_f()) |
+                     fb_mmu_debug_wr_vol_false_f() |
+                     fb_mmu_debug_wr_addr_f(addr));
+
+        addr = nvgpu_mem_get_addr(g, &g->mm.mmu_rd_mem);
+        addr >>= fb_mmu_debug_rd_addr_alignment_v();
+
+        gk20a_writel(g, fb_mmu_debug_rd_r(),
+                     nvgpu_aperture_mask(g, &g->mm.mmu_rd_mem,
+                                fb_mmu_debug_wr_aperture_sys_mem_ncoh_f(),
+                                fb_mmu_debug_wr_aperture_sys_mem_coh_f(),
+                                fb_mmu_debug_rd_aperture_vid_mem_f()) |
+                     fb_mmu_debug_rd_vol_false_f() |
+                     fb_mmu_debug_rd_addr_f(addr));
 }
 
 int gm20b_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
diff --git a/drivers/gpu/nvgpu/common/mm/mm.c b/drivers/gpu/nvgpu/common/mm/mm.c
index 54f621ae..988b1e5c 100644
--- a/drivers/gpu/nvgpu/common/mm/mm.c
+++ b/drivers/gpu/nvgpu/common/mm/mm.c
@@ -173,6 +173,9 @@ static void nvgpu_remove_mm_support(struct mm_gk20a *mm)
 {
         struct gk20a *g = gk20a_from_mm(mm);
 
+        nvgpu_dma_free(g, &mm->mmu_wr_mem);
+        nvgpu_dma_free(g, &mm->mmu_rd_mem);
+
         if (g->ops.mm.fault_info_mem_destroy) {
                 g->ops.mm.fault_info_mem_destroy(g);
         }
@@ -294,6 +297,32 @@ static int nvgpu_init_ce_vm(struct mm_gk20a *mm)
         return 0;
 }
 
+static int nvgpu_init_mmu_debug(struct mm_gk20a *mm)
+{
+        struct gk20a *g = gk20a_from_mm(mm);
+        int err;
+
+        if (!nvgpu_mem_is_valid(&mm->mmu_wr_mem)) {
+                err = nvgpu_dma_alloc_sys(g, SZ_4K, &mm->mmu_wr_mem);
+                if (err) {
+                        goto err;
+                }
+        }
+
+        if (!nvgpu_mem_is_valid(&mm->mmu_rd_mem)) {
+                err = nvgpu_dma_alloc_sys(g, SZ_4K, &mm->mmu_rd_mem);
+                if (err) {
+                        goto err_free_wr_mem;
+                }
+        }
+        return 0;
+
+ err_free_wr_mem:
+        nvgpu_dma_free(g, &mm->mmu_wr_mem);
+ err:
+        return -ENOMEM;
+}
+
 void nvgpu_init_mm_ce_context(struct gk20a *g)
 {
 #if defined(CONFIG_GK20A_VIDMEM)
@@ -459,6 +488,10 @@ static int nvgpu_init_mm_setup_sw(struct gk20a *g)
                 return err;
         }
 
+        err = nvgpu_init_mmu_debug(mm);
+        if (err)
+                return err;
+
         mm->remove_support = nvgpu_remove_mm_support;
         mm->remove_ce_support = nvgpu_remove_mm_ce_support;