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authorThomas Fleury <tfleury@nvidia.com>2017-04-24 12:12:02 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-05-24 07:55:54 -0400
commitc1f549e5b27e0b86e3ab8e14f47b13aa9997a1d8 (patch)
tree76ae920b54fff7d09ee8bcf69dd7780f4a0f0ade /drivers/gpu/nvgpu/common
parent0cca34641d3dedc973cd6080e953df885da5b53c (diff)
gpu: nvgpu: I2C port for INA3221 in platform data
PG419 board had been reworked to swap I2C_B and I2C_C (in order to solve PL issues). As a result, on this board we now use a different I2C port than on PG418. Remove support for non-reworked boards: VBIOS version must be at least .56 Add I2C port in platform data. Bug 1914023 Change-Id: Ia7940eaa823bb4d21f662491ba1de7c8490ce9f0 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: http://git-master/r/1467930 (cherry picked from commit cda5fefb456c0edc75c99dedf67a3020424967c1) Reviewed-on: http://git-master/r/1485191 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common')
-rw-r--r--drivers/gpu/nvgpu/common/linux/pci.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c
index 37673f5e..d729d273 100644
--- a/drivers/gpu/nvgpu/common/linux/pci.c
+++ b/drivers/gpu/nvgpu/common/linux/pci.c
@@ -89,6 +89,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
89 .hardcode_sw_threshold = true, 89 .hardcode_sw_threshold = true,
90 .ina3221_dcb_index = 0, 90 .ina3221_dcb_index = 0,
91 .ina3221_i2c_address = 0x84, 91 .ina3221_i2c_address = 0x84,
92 .ina3221_i2c_port = 0x2,
92 }, 93 },
93 { /* DEVICE=0x1c36 */ 94 { /* DEVICE=0x1c36 */
94 /* ptimer src frequency in hz */ 95 /* ptimer src frequency in hz */
@@ -123,6 +124,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
123 .hardcode_sw_threshold = true, 124 .hardcode_sw_threshold = true,
124 .ina3221_dcb_index = 0, 125 .ina3221_dcb_index = 0,
125 .ina3221_i2c_address = 0x84, 126 .ina3221_i2c_address = 0x84,
127 .ina3221_i2c_port = 0x2,
126 }, 128 },
127 { /* DEVICE=0x1c37 */ 129 { /* DEVICE=0x1c37 */
128 /* ptimer src frequency in hz */ 130 /* ptimer src frequency in hz */
@@ -157,6 +159,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
157 .hardcode_sw_threshold = true, 159 .hardcode_sw_threshold = true,
158 .ina3221_dcb_index = 0, 160 .ina3221_dcb_index = 0,
159 .ina3221_i2c_address = 0x84, 161 .ina3221_i2c_address = 0x84,
162 .ina3221_i2c_port = 0x2,
160 }, 163 },
161 { /* DEVICE=0x1c75 */ 164 { /* DEVICE=0x1c75 */
162 /* ptimer src frequency in hz */ 165 /* ptimer src frequency in hz */
@@ -187,10 +190,11 @@ static struct gk20a_platform nvgpu_pci_device[] = {
187 .ch_wdt_timeout_ms = 7000, 190 .ch_wdt_timeout_ms = 7000,
188 191
189 .vidmem_is_vidmem = true, 192 .vidmem_is_vidmem = true,
190 .vbios_min_version = 0x86064700, 193 .vbios_min_version = 0x86065600,
191 .hardcode_sw_threshold = false, 194 .hardcode_sw_threshold = false,
192 .ina3221_dcb_index = 1, 195 .ina3221_dcb_index = 1,
193 .ina3221_i2c_address = 0x80, 196 .ina3221_i2c_address = 0x80,
197 .ina3221_i2c_port = 0x1,
194 } 198 }
195}; 199};
196 200