gpu: nvgpu: mclk switching sequences for PG419

VBIOS memory settings have been updated for PG419, significantly
modifying MCLK switching sequences. This change adds support for
PG419 tables, while remaining backward compatible with PG418.

Bug 1921082
JIRA EVLR-1269

Change-Id: Ia8a1f8b3f482e348a46f0acb540af23287d9c11e
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1484110
(cherry picked from commit c2444ae89caf97da2702e8486cc8fb162b4f50b1)
Reviewed-on: http://git-master/r/1485300
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 7 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/common/linux/pci.c b/drivers/gpu/nvgpu/common/linux/pci.c
index 4351ba5b..31181808 100644
--- a/drivers/gpu/nvgpu/common/linux/pci.c
+++ b/drivers/gpu/nvgpu/common/linux/pci.c
@@ -25,6 +25,7 @@
 #include "gk20a/gk20a.h"
 #include "gk20a/platform_gk20a.h"
 #include "clk/clk.h"
+#include "clk/clk_mclk.h"
 #include "module.h"
 #include "intr.h"
 
@@ -92,6 +93,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
         .ina3221_dcb_index = 0,
         .ina3221_i2c_address = 0x84,
         .ina3221_i2c_port = 0x2,
+        .mem_config_idx = GP106_MEM_CONFIG_GDDR5_PG418,
         },
         { /* DEVICE=0x1c36 */
         /* ptimer src frequency in hz */
@@ -127,6 +129,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
         .ina3221_dcb_index = 0,
         .ina3221_i2c_address = 0x84,
         .ina3221_i2c_port = 0x2,
+        .mem_config_idx = GP106_MEM_CONFIG_GDDR5_PG418,
         },
         { /* DEVICE=0x1c37 */
         /* ptimer src frequency in hz */
@@ -162,6 +165,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
         .ina3221_dcb_index = 0,
         .ina3221_i2c_address = 0x84,
         .ina3221_i2c_port = 0x2,
+        .mem_config_idx = GP106_MEM_CONFIG_GDDR5_PG418,
         },
         { /* DEVICE=0x1c75 */
         /* ptimer src frequency in hz */
@@ -197,6 +201,7 @@ static struct gk20a_platform nvgpu_pci_device[] = {
         .ina3221_dcb_index = 1,
         .ina3221_i2c_address = 0x80,
         .ina3221_i2c_port = 0x1,
+        .mem_config_idx = GP106_MEM_CONFIG_GDDR5_PG419,
         }
 };
 
@@ -392,6 +397,8 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
                 g->msi_enabled = true;
 #endif
 
+        g->mem_config_idx = platform->mem_config_idx;
+
         g->irq_stall = pdev->irq;
         g->irq_nonstall = pdev->irq;
         if (g->irq_stall < 0)