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author | Sandeep Shinde <sashinde@nvidia.com> | 2017-08-24 02:42:42 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-07 23:07:13 -0400 |
commit | 33f192b2f781007fb7f9598613ce3811f3f39237 (patch) | |
tree | e0d559b108b97f01db020ec257b45eded289a02c /drivers/gpu/nvgpu/common | |
parent | 70c4496ca7add205f604c5c7fec8c16033394ba0 (diff) |
gpu: nvgpu: Add pd_max_batches sysfs node for gp10b
Add a new sysfs node pd_max_batches for setting max batches value in
NV_PGRAPH_PRI_PD_AB_DIST_CONFIG_1_MAX_BATCHES register which controls
max number of batches per alpha-beta transition stored in PD.
Bug 1927124
Change-Id: I2817f2d70dab348d8b0b8ba19bf1e9b9d23ca907
Signed-off-by: Sandeep Shinde <sashinde@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1544104
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
(cherry picked from commit aa4daddda23aa44a84464200f497eac802a8e6ce)
Reviewed-on: https://git-master.nvidia.com/r/1543355
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/common')
-rw-r--r-- | drivers/gpu/nvgpu/common/linux/sysfs.c | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/linux/sysfs.c b/drivers/gpu/nvgpu/common/linux/sysfs.c index 1b59c480..7b614023 100644 --- a/drivers/gpu/nvgpu/common/linux/sysfs.c +++ b/drivers/gpu/nvgpu/common/linux/sysfs.c | |||
@@ -927,6 +927,33 @@ static ssize_t czf_bypass_read(struct device *dev, | |||
927 | 927 | ||
928 | static DEVICE_ATTR(czf_bypass, ROOTRW, czf_bypass_read, czf_bypass_store); | 928 | static DEVICE_ATTR(czf_bypass, ROOTRW, czf_bypass_read, czf_bypass_store); |
929 | 929 | ||
930 | static ssize_t pd_max_batches_store(struct device *dev, | ||
931 | struct device_attribute *attr, const char *buf, size_t count) | ||
932 | { | ||
933 | struct gk20a *g = get_gk20a(dev); | ||
934 | unsigned long val; | ||
935 | |||
936 | if (kstrtoul(buf, 10, &val) < 0) | ||
937 | return -EINVAL; | ||
938 | |||
939 | if (val > 64) | ||
940 | return -EINVAL; | ||
941 | |||
942 | g->gr.pd_max_batches = val; | ||
943 | |||
944 | return count; | ||
945 | } | ||
946 | |||
947 | static ssize_t pd_max_batches_read(struct device *dev, | ||
948 | struct device_attribute *attr, char *buf) | ||
949 | { | ||
950 | struct gk20a *g = get_gk20a(dev); | ||
951 | |||
952 | return sprintf(buf, "%d\n", g->gr.pd_max_batches); | ||
953 | } | ||
954 | |||
955 | static DEVICE_ATTR(pd_max_batches, ROOTRW, pd_max_batches_read, pd_max_batches_store); | ||
956 | |||
930 | 957 | ||
931 | void nvgpu_remove_sysfs(struct device *dev) | 958 | void nvgpu_remove_sysfs(struct device *dev) |
932 | { | 959 | { |
@@ -961,6 +988,7 @@ void nvgpu_remove_sysfs(struct device *dev) | |||
961 | #endif | 988 | #endif |
962 | 989 | ||
963 | device_remove_file(dev, &dev_attr_czf_bypass); | 990 | device_remove_file(dev, &dev_attr_czf_bypass); |
991 | device_remove_file(dev, &dev_attr_pd_max_batches); | ||
964 | 992 | ||
965 | if (strcmp(dev_name(dev), "gpu.0")) { | 993 | if (strcmp(dev_name(dev), "gpu.0")) { |
966 | struct kobject *kobj = &dev->kobj; | 994 | struct kobject *kobj = &dev->kobj; |
@@ -1006,6 +1034,7 @@ int nvgpu_create_sysfs(struct device *dev) | |||
1006 | #endif | 1034 | #endif |
1007 | 1035 | ||
1008 | error |= device_create_file(dev, &dev_attr_czf_bypass); | 1036 | error |= device_create_file(dev, &dev_attr_czf_bypass); |
1037 | error |= device_create_file(dev, &dev_attr_pd_max_batches); | ||
1009 | 1038 | ||
1010 | if (strcmp(dev_name(dev), "gpu.0")) { | 1039 | if (strcmp(dev_name(dev), "gpu.0")) { |
1011 | struct kobject *kobj = &dev->kobj; | 1040 | struct kobject *kobj = &dev->kobj; |