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authorAntony Clince Alex <aalex@nvidia.com>2018-04-30 03:27:29 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-05-09 21:26:16 -0400
commit560e243f2d8b6cf3fafd8e79560cbf6dffe58e9e (patch)
tree263e9cefffae71b5e4d2c9bf709dbcb6458ba862 /drivers/gpu/nvgpu/common/sim_pci.c
parentdd739fcb039d51606e9a5454ec0aab17bcb01965 (diff)
gpu: nvgpu: added nvgpu_sim_init_late
Split sim initialization to two parts, first part gets invoked as part of probe and second part gets invoked in the finalize_poweron after the hal has been initialized. This is done because some of the sim init code uses mm api's which are assigned as part of hal init. replaced sim buffer allocation api's with nvgpu_dma_sys_alloc. Change-Id: Ib019fbb747bdf6dcc74e7deba732ab41f0869e96 Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1705424 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/sim_pci.c')
-rw-r--r--drivers/gpu/nvgpu/common/sim_pci.c30
1 files changed, 20 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/common/sim_pci.c b/drivers/gpu/nvgpu/common/sim_pci.c
index a72623e9..2f6f6765 100644
--- a/drivers/gpu/nvgpu/common/sim_pci.c
+++ b/drivers/gpu/nvgpu/common/sim_pci.c
@@ -201,21 +201,14 @@ static int nvgpu_sim_esc_readl(struct gk20a *g,
201 return err; 201 return err;
202} 202}
203 203
204int nvgpu_init_sim_support_pci(struct gk20a *g) 204static void nvgpu_sim_init_late(struct gk20a *g)
205{ 205{
206 int err = -ENOMEM;
207 u64 phys; 206 u64 phys;
208 207
209 if (!g->sim) 208 if (!g->sim)
210 return 0; 209 return;
211 210
212 /* allocate sim event/msg buffers */ 211 nvgpu_info(g, "sim init late pci");
213 err = nvgpu_alloc_sim_buffer(g, &g->sim->send_bfr);
214 err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr);
215 err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr);
216
217 if (err)
218 goto fail;
219 /* mark send ring invalid */ 212 /* mark send ring invalid */
220 sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f()); 213 sim_writel(g->sim, sim_send_ring_r(), sim_send_ring_status_invalid_f());
221 214
@@ -249,7 +242,24 @@ int nvgpu_init_sim_support_pci(struct gk20a *g)
249 sim_recv_ring_target_phys_pci_coherent_f() | 242 sim_recv_ring_target_phys_pci_coherent_f() |
250 sim_recv_ring_size_4kb_f() | 243 sim_recv_ring_size_4kb_f() |
251 sim_recv_ring_addr_lo_f(phys >> PAGE_SHIFT)); 244 sim_recv_ring_addr_lo_f(phys >> PAGE_SHIFT));
245}
246
247int nvgpu_init_sim_support_pci(struct gk20a *g)
248{
249 int err = -ENOMEM;
250
251 if(!g->sim)
252 return 0;
253
254 /* allocate sim event/msg buffers */
255 err = nvgpu_alloc_sim_buffer(g, &g->sim->send_bfr);
256 err = err || nvgpu_alloc_sim_buffer(g, &g->sim->recv_bfr);
257 err = err || nvgpu_alloc_sim_buffer(g, &g->sim->msg_bfr);
258
259 if (err)
260 goto fail;
252 261
262 g->sim->sim_init_late = nvgpu_sim_init_late;
253 g->sim->remove_support = nvgpu_remove_sim_support; 263 g->sim->remove_support = nvgpu_remove_sim_support;
254 g->sim->esc_readl = nvgpu_sim_esc_readl; 264 g->sim->esc_readl = nvgpu_sim_esc_readl;
255 return 0; 265 return 0;