diff options
author | Alex Waterman <alexw@nvidia.com> | 2017-04-06 18:30:01 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-04-20 19:14:32 -0400 |
commit | e32f62fadfcde413bcd9b5af61ad884e27ba2bf1 (patch) | |
tree | eff606a0826841eae6ade5906acd9da589d1179a /drivers/gpu/nvgpu/common/semaphore.c | |
parent | 52bd58b560d0b3b49c03ef5c2637b67adeac8193 (diff) |
gpu: nvgpu: Move Linux nvgpu_mem fields
Hide the Linux specific nvgpu_mem fields so that in subsequent patches
core code can instead of using struct sg_table it can use mem_desc.
Routines for accessing system specific fields will be added as needed.
This is the first step in a fairly major overhaul of the GMMU mapping
routines. There are numerous issues with the current design (or lack
there of): massively coupled code, system dependencies, disorganization,
etc.
JIRA NVGPU-12
JIRA NVGPU-30
Change-Id: I2e7d3ae3a07468cfc17c1c642d28ed1b0952474d
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1464076
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/semaphore.c')
-rw-r--r-- | drivers/gpu/nvgpu/common/semaphore.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/common/semaphore.c b/drivers/gpu/nvgpu/common/semaphore.c index 9e437410..bf7b6348 100644 --- a/drivers/gpu/nvgpu/common/semaphore.c +++ b/drivers/gpu/nvgpu/common/semaphore.c | |||
@@ -60,7 +60,7 @@ static int __nvgpu_semaphore_sea_grow(struct nvgpu_semaphore_sea *sea) | |||
60 | if (ret) | 60 | if (ret) |
61 | goto out; | 61 | goto out; |
62 | 62 | ||
63 | sea->ro_sg_table = sea->sea_mem.sgt; | 63 | sea->ro_sg_table = sea->sea_mem.priv.sgt; |
64 | sea->size = SEMAPHORE_POOL_COUNT; | 64 | sea->size = SEMAPHORE_POOL_COUNT; |
65 | sea->map_size = SEMAPHORE_POOL_COUNT * PAGE_SIZE; | 65 | sea->map_size = SEMAPHORE_POOL_COUNT * PAGE_SIZE; |
66 | 66 | ||
@@ -154,7 +154,7 @@ struct nvgpu_semaphore_pool *nvgpu_semaphore_pool_alloc( | |||
154 | 154 | ||
155 | page_idx = (unsigned long)ret; | 155 | page_idx = (unsigned long)ret; |
156 | 156 | ||
157 | p->page = sea->sea_mem.pages[page_idx]; | 157 | p->page = sea->sea_mem.priv.pages[page_idx]; |
158 | p->ro_sg_table = sea->ro_sg_table; | 158 | p->ro_sg_table = sea->ro_sg_table; |
159 | p->page_idx = page_idx; | 159 | p->page_idx = page_idx; |
160 | p->sema_sea = sea; | 160 | p->sema_sea = sea; |