gpu: nvgpu: Add wrapper over atomic_t and atomic64_t

- added wrapper structs nvgpu_atomic_t and nvgpu_atomic64_t over
  atomic_t and atomic64_t
- added nvgpu_atomic_* and nvgpu_atomic64_* APIs to access the above
  wrappers.

JIRA NVGPU-121

Change-Id: I61667bb0a84c2fc475365abb79bffb42b8b4786a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1533044
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

1 files changed, 2 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/common/semaphore.c b/drivers/gpu/nvgpu/common/semaphore.c
index 3e916b9d..ac45aaaa 100644
--- a/drivers/gpu/nvgpu/common/semaphore.c
+++ b/drivers/gpu/nvgpu/common/semaphore.c
@@ -364,7 +364,7 @@ static int __nvgpu_init_hw_sema(struct channel_gk20a *ch)
         hw_sema->p = p;
         hw_sema->idx = hw_sema_idx;
         hw_sema->offset = SEMAPHORE_SIZE * hw_sema_idx;
-        atomic_set(&hw_sema->next_value, 0);
+        nvgpu_atomic_set(&hw_sema->next_value, 0);
         nvgpu_init_list_node(&hw_sema->hw_sema_list);
         nvgpu_mem_wr(ch->g, &p->rw_mem, hw_sema->offset, 0);
 
@@ -425,7 +425,7 @@ struct nvgpu_semaphore *nvgpu_semaphore_alloc(struct channel_gk20a *ch)
 
         kref_init(&s->ref);
         s->hw_sema = ch->hw_sema;
-        atomic_set(&s->value, 0);
+        nvgpu_atomic_set(&s->value, 0);
 
         /*
          * Take a ref on the pool so that we can keep this pool alive for