diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-09-17 04:59:41 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-28 13:24:56 -0400 |
commit | 24f47f0de8bd5f10bdcd505237ff33baf6fe80eb (patch) | |
tree | 084e852439194b91c188f46d1f3f016d73bf71ce /drivers/gpu/nvgpu/common/sec2 | |
parent | 18f80ca25c11b21f9212c97ba5a8a26396cbf2b2 (diff) |
gpu: nvgpu: SEC2 RTOS support s/w init
-Created struct nvgpu_sec2 to hold members
related to SEC2-RTOS ucode support in header file
sec2.h
-Created nvgpu_sec2 variable under struct gk20a.
-Created NVGPU_SUPPORT_SEC2_RTOS enable flag
to enable SEC2 RTOS support.
-Defined method nvgpu_init_sec2_support() to
init SEC2 RTOS support by performing s/w setup like
mutex-init, sequence-init & add support
for remove_support.
-Defined method nvgpu_sec2_destroy() to deinit
SEC2 RTOS support.
-Added nvgpu_init_sec2_support()/nvgpu_sec2_destroy()
as part gk20a_finalize_poweron()/gk20a_prepare_poweroff()
sequence based on NVGPU_SUPPORT_SEC2_RTOS enable flag
-Assigned g->sec2->flcn to point to g->sec2_flcn to access
falcon.
-Made Makefile changes to include sec2.c to build
JIRA NVGPUT-80
Change-Id: Icdc8c25994e305427ad465a5a20e9ce533759a9e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1791955
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/sec2')
-rw-r--r-- | drivers/gpu/nvgpu/common/sec2/sec2.c | 131 |
1 files changed, 131 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/common/sec2/sec2.c b/drivers/gpu/nvgpu/common/sec2/sec2.c new file mode 100644 index 00000000..842d39f9 --- /dev/null +++ b/drivers/gpu/nvgpu/common/sec2/sec2.c | |||
@@ -0,0 +1,131 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #include <nvgpu/gk20a.h> | ||
24 | #include <nvgpu/log.h> | ||
25 | #include <nvgpu/timers.h> | ||
26 | #include <nvgpu/sec2.h> | ||
27 | #include <nvgpu/sec2if/sec2_if_sec2.h> | ||
28 | #include <nvgpu/sec2if/sec2_if_cmn.h> | ||
29 | |||
30 | static void sec2_seq_init(struct nvgpu_sec2 *sec2) | ||
31 | { | ||
32 | u32 i = 0; | ||
33 | |||
34 | nvgpu_log_fn(sec2->g, " "); | ||
35 | |||
36 | memset(sec2->seq, 0, | ||
37 | sizeof(struct sec2_sequence) * SEC2_MAX_NUM_SEQUENCES); | ||
38 | |||
39 | memset(sec2->sec2_seq_tbl, 0, sizeof(sec2->sec2_seq_tbl)); | ||
40 | |||
41 | for (i = 0; i < SEC2_MAX_NUM_SEQUENCES; i++) { | ||
42 | sec2->seq[i].id = (u8)i; | ||
43 | } | ||
44 | } | ||
45 | |||
46 | static void nvgpu_remove_sec2_support(struct nvgpu_sec2 *sec2) | ||
47 | { | ||
48 | struct gk20a *g = sec2->g; | ||
49 | |||
50 | nvgpu_log_fn(g, " "); | ||
51 | |||
52 | nvgpu_kfree(g, sec2->seq); | ||
53 | nvgpu_mutex_destroy(&sec2->sec2_seq_lock); | ||
54 | nvgpu_mutex_destroy(&sec2->isr_mutex); | ||
55 | } | ||
56 | |||
57 | static int nvgpu_init_sec2_setup_sw(struct gk20a *g, struct nvgpu_sec2 *sec2) | ||
58 | { | ||
59 | int err = 0; | ||
60 | |||
61 | nvgpu_log_fn(g, " "); | ||
62 | |||
63 | sec2->seq = nvgpu_kzalloc(g, SEC2_MAX_NUM_SEQUENCES * | ||
64 | sizeof(struct sec2_sequence)); | ||
65 | if (sec2->seq == NULL) { | ||
66 | err = -ENOMEM; | ||
67 | goto exit; | ||
68 | } | ||
69 | |||
70 | err = nvgpu_mutex_init(&sec2->sec2_seq_lock); | ||
71 | if (err != 0) { | ||
72 | goto free_seq_alloc; | ||
73 | } | ||
74 | |||
75 | sec2_seq_init(sec2); | ||
76 | |||
77 | err = nvgpu_mutex_init(&sec2->isr_mutex); | ||
78 | if (err != 0) { | ||
79 | goto free_seq_mutex; | ||
80 | } | ||
81 | |||
82 | sec2->remove_support = nvgpu_remove_sec2_support; | ||
83 | |||
84 | goto exit; | ||
85 | |||
86 | free_seq_mutex: | ||
87 | nvgpu_mutex_destroy(&sec2->sec2_seq_lock); | ||
88 | free_seq_alloc: | ||
89 | nvgpu_kfree(g, sec2->seq); | ||
90 | |||
91 | exit: | ||
92 | return err; | ||
93 | } | ||
94 | |||
95 | int nvgpu_init_sec2_support(struct gk20a *g) | ||
96 | { | ||
97 | struct nvgpu_sec2 *sec2 = &g->sec2; | ||
98 | int err = 0; | ||
99 | |||
100 | nvgpu_log_fn(g, " "); | ||
101 | |||
102 | err = nvgpu_init_sec2_setup_sw(g, sec2); | ||
103 | if (err != 0) { | ||
104 | goto exit; | ||
105 | } | ||
106 | |||
107 | /* TBD - call SEC2 in secure mode to boot RTOS */ | ||
108 | |||
109 | exit: | ||
110 | return err; | ||
111 | } | ||
112 | |||
113 | int nvgpu_sec2_destroy(struct gk20a *g) | ||
114 | { | ||
115 | struct nvgpu_sec2 *sec2 = &g->sec2; | ||
116 | u32 i = 0; | ||
117 | |||
118 | nvgpu_log_fn(g, " "); | ||
119 | |||
120 | nvgpu_mutex_acquire(&sec2->isr_mutex); | ||
121 | sec2->isr_enabled = false; | ||
122 | nvgpu_mutex_release(&sec2->isr_mutex); | ||
123 | |||
124 | for (i = 0; i < SEC2_QUEUE_NUM; i++) { | ||
125 | nvgpu_flcn_queue_free(sec2->flcn, &sec2->queue[i]); | ||
126 | } | ||
127 | |||
128 | sec2->sec2_ready = false; | ||
129 | |||
130 | return 0; | ||
131 | } | ||