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authorVinod G <vinodg@nvidia.com>2018-06-12 20:24:53 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-07-12 23:43:55 -0400
commit96d4842c0dbae051258408480b981ed034163c13 (patch)
treedd37df45d108ddb728c1e02b0d53f075177afb68 /drivers/gpu/nvgpu/common/rbtree.c
parent97c6a10928cc463825479911c3a6518ade34ebc0 (diff)
gpu: nvgpu: gv11b: fix PMA list alignment in ctxsw buffer
ucode changed so that it expects LIST_nv_perf_pma_ctx_reg list in ctxsw buffer to be 256 byte aligned. This change was added to gv100 before, adding similar change to gv11b. bug 2045640 Change-Id: I1f92d38e607f70d5602ef6d5c607b9dc20807245 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1747895 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/rbtree.c')
0 files changed, 0 insertions, 0 deletions