nvgpu: common: MISRA 10.1 boolean fixes

Fix violations where a variable of type non-boolean is used as a
boolean in gpu/nvgpu/common.

JIRA NVGPU-646

Change-Id: I91baa5cf1d38081161336bde5fbc06661b741273
Signed-off-by: Amulya <Amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1807133
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 3 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c
index c169115e..24c35576 100644
--- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c
+++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c
@@ -98,7 +98,7 @@ void gm20b_priv_ring_isr(struct gk20a *g)
         /* poll for clear interrupt done */
         cmd = pri_ringmaster_command_cmd_v(
                 gk20a_readl(g, pri_ringmaster_command_r()));
-        while (cmd != pri_ringmaster_command_cmd_no_cmd_v() && retry) {
+        while ((cmd != pri_ringmaster_command_cmd_no_cmd_v()) && (retry != 0)) {
                 nvgpu_udelay(20);
                 retry--;
                 cmd = pri_ringmaster_command_cmd_v(
diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c
index 53141c9a..f8a136c6 100644
--- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c
+++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.c
@@ -181,7 +181,7 @@ void gp10b_priv_ring_isr(struct gk20a *g)
                                 }
 
                                 status1 = status1 & (~(BIT(gpc)));
-                                if (!status1) {
+                                if (status1 == 0U) {
                                         break;
                                 }
                         }
@@ -196,7 +196,7 @@ void gp10b_priv_ring_isr(struct gk20a *g)
         /* poll for clear interrupt done */
         cmd = pri_ringmaster_command_cmd_v(
                 gk20a_readl(g, pri_ringmaster_command_r()));
-        while (cmd != pri_ringmaster_command_cmd_no_cmd_v() && retry) {
+        while ((cmd != pri_ringmaster_command_cmd_no_cmd_v()) && (retry != 0)) {
                 nvgpu_udelay(20);
                 cmd = pri_ringmaster_command_cmd_v(
                         gk20a_readl(g, pri_ringmaster_command_r()));