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authorDebarshi Dutta <ddutta@nvidia.com>2019-04-30 04:24:08 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2019-05-09 17:41:30 -0400
commitc81cc032c48a1b25e095b17b77399166c9091ff3 (patch)
treeace7d238c55bbb5e96fb6fd74deb156f3c513bae /drivers/gpu/nvgpu/common/priv_ring
parentf495f52c70c6bd7b7a4e6897270e4696efa57d5c (diff)
gpu: nvgpu: add cg and pg function
Add new power/clock gating functions that can be called by other units. New clock_gating functions will reside in cg.c under common/power_features/cg unit. New power gating functions will reside in pg.c under common/power_features/pg unit. Use nvgpu_pg_elpg_disable and nvgpu_pg_elpg_enable to disable/enable elpg and also in gr_gk20a_elpg_protected macro to access gr registers. Add cg_pg_lock to make elpg_enabled, elcg_enabled, blcg_enabled and slcg_enabled thread safe. JIRA NVGPU-2014 Change-Id: I00d124c2ee16242c9a3ef82e7620fbb7f1297aff Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2025493 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> (cherry-picked from c90585856567a547173a8b207365b3a4a3ccdd57 in dev-kernel) Reviewed-on: https://git-master.nvidia.com/r/2108406 GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/priv_ring')
-rw-r--r--drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c
index e30d94f9..8c9b23fa 100644
--- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c
+++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.c
@@ -26,6 +26,7 @@
26#include <nvgpu/enabled.h> 26#include <nvgpu/enabled.h>
27#include <nvgpu/io.h> 27#include <nvgpu/io.h>
28#include <nvgpu/utils.h> 28#include <nvgpu/utils.h>
29#include <nvgpu/power_features/cg.h>
29 30
30#include "priv_ring_gm20b.h" 31#include "priv_ring_gm20b.h"
31 32
@@ -41,10 +42,7 @@ void gm20b_priv_ring_enable(struct gk20a *g)
41 42
42 nvgpu_log(g, gpu_dbg_info, "enabling priv ring"); 43 nvgpu_log(g, gpu_dbg_info, "enabling priv ring");
43 44
44 if (g->ops.clock_gating.slcg_priring_load_gating_prod) { 45 nvgpu_cg_slcg_priring_load_enable(g);
45 g->ops.clock_gating.slcg_priring_load_gating_prod(g,
46 g->slcg_enabled);
47 }
48 46
49 gk20a_writel(g,pri_ringmaster_command_r(), 47 gk20a_writel(g,pri_ringmaster_command_r(),
50 0x4); 48 0x4);