nvgpu: common: MISRA Rule 21.2 header guard fixes

MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations in common directory
by renaming them to follow the convention,
'NVGPU_PARENT-DIR_HEADER-NAME' when there is no keyword repetition
between file name and directory or 'NVGPU_HEADER-NAME' when there
is repetition.

JIRA NVGPU-1028

Change-Id: Idf10f6b179cfd96bfb8ab8e9e2bf79c26591905d
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1809086
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2 files changed, 6 insertions, 6 deletions

diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h
index 02f20515..13d1a8ce 100644
--- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h
+++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gm20b.h
@@ -19,8 +19,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __PRIV_RING_GM20B_H__
-#define __PRIV_RING_GM20B_H__
+#ifndef NVGPU_PRIV_RING_GM20B_H
+#define NVGPU_PRIV_RING_GM20B_H
 
 struct gk20a;
 
@@ -29,4 +29,4 @@ void gm20b_priv_ring_enable(struct gk20a *g);
 void gm20b_priv_set_timeout_settings(struct gk20a *g);
 u32 gm20b_priv_ring_enum_ltc(struct gk20a *g);
 
-#endif /*__PRIV_RING_GM20B_H__*/
+#endif /* NVGPU_PRIV_RING_GM20B_H */
diff --git a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h
index dd418e5b..db96ec04 100644
--- a/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h
+++ b/drivers/gpu/nvgpu/common/priv_ring/priv_ring_gp10b.h
@@ -21,8 +21,8 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  */
-#ifndef __PRIV_RING_GP10B_H__
-#define __PRIV_RING_GP10B_H__
+#ifndef NVGPU_PRIV_RING_GP10B_H
+#define NVGPU_PRIV_RING_GP10B_H
 
 struct gk20a;
 
@@ -30,4 +30,4 @@ void gp10b_priv_ring_isr(struct gk20a *g);
 void gp10b_priv_ring_decode_error_code(struct gk20a *g,
                         u32 error_code);
 
-#endif /*__PRIV_RING_GP10B_H__*/
+#endif /* NVGPU_PRIV_RING_GP10B_H */