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authorSrirangan <smadhavan@nvidia.com>2018-08-20 05:13:41 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-08-23 00:55:49 -0400
commit3fbaee7099039eee84343027dd1ce20679c0c113 (patch)
tree0de4934723f58cad9cdcdb642927ffce0cfac6d8 /drivers/gpu/nvgpu/common/pramin.c
parent52305f0514d29e7fb2cb5e2154188e09faa3fe94 (diff)
gpu: nvgpu: common: Fix MISRA 15.6 violations
MISRA Rule-15.6 requires that all if-else blocks be enclosed in braces, including single statement blocks. Fix errors due to single statement if blocks without braces, introducing the braces. JIRA NVGPU-671 Change-Id: I4d9933c51a297a725f48cbb15520a70494d74aeb Signed-off-by: Srirangan <smadhavan@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1800833 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pramin.c')
-rw-r--r--drivers/gpu/nvgpu/common/pramin.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/common/pramin.c b/drivers/gpu/nvgpu/common/pramin.c
index ba6a92ba..1448fed1 100644
--- a/drivers/gpu/nvgpu/common/pramin.c
+++ b/drivers/gpu/nvgpu/common/pramin.c
@@ -53,17 +53,19 @@ static void nvgpu_pramin_access_batched(struct gk20a *g, struct nvgpu_mem *mem,
53 * driver should be refactored to prevent this from happening, but for 53 * driver should be refactored to prevent this from happening, but for
54 * now it is ok just to ignore the writes 54 * now it is ok just to ignore the writes
55 */ 55 */
56 if (!gk20a_io_exists(g) && nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING)) 56 if (!gk20a_io_exists(g) && nvgpu_is_enabled(g, NVGPU_DRIVER_IS_DYING)) {
57 return; 57 return;
58 }
58 59
59 alloc = mem->vidmem_alloc; 60 alloc = mem->vidmem_alloc;
60 sgt = &alloc->sgt; 61 sgt = &alloc->sgt;
61 62
62 nvgpu_sgt_for_each_sgl(sgl, sgt) { 63 nvgpu_sgt_for_each_sgl(sgl, sgt) {
63 if (offset >= nvgpu_sgt_get_length(sgt, sgl)) 64 if (offset >= nvgpu_sgt_get_length(sgt, sgl)) {
64 offset -= nvgpu_sgt_get_length(sgt, sgl); 65 offset -= nvgpu_sgt_get_length(sgt, sgl);
65 else 66 } else {
66 break; 67 break;
68 }
67 } 69 }
68 70
69 while (size) { 71 while (size) {