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author | Alex Waterman <alexw@nvidia.com> | 2017-07-12 19:40:31 -0400 |
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committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-16 06:55:50 -0400 |
commit | 0dd02e634ddc2f3e048b39048d2299d24401fdf8 (patch) | |
tree | 3f99a2355e7f8f4a179bbc34b1ff219e115ee175 /drivers/gpu/nvgpu/common/pramin.c | |
parent | 32c6a81258daf155a382526637c84925dc52022c (diff) |
gpu: nvgpu: Add su_rd_coalesce register field
Add the surface rd coalesce field in the register that
controls read coalescing.
Bug 200314091
Change-Id: I185ad7e6ef64ecae9369e26d22a7381611ddc693
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1518305
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pramin.c')
0 files changed, 0 insertions, 0 deletions