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authorAlex Waterman <alexw@nvidia.com>2017-05-25 19:56:50 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-09-22 15:52:48 -0400
commit0090ee5aca268a3c359f34c74b8c521df3bd8593 (patch)
tree2779dc64554cdb38b717ce09c0e3dcbf36107ed3 /drivers/gpu/nvgpu/common/pramin.c
parente32cc0108cf2ef5de7a17f0f6c0aa9af7faf23ed (diff)
gpu: nvgpu: nvgpu SGL implementation
The last major item preventing the core MM code in the nvgpu driver from being platform agnostic is the usage of Linux scattergather tables and scattergather lists. These data structures are used throughout the mapping code to handle discontiguous DMA allocations and also overloaded to represent VIDMEM allocs. The notion of a scatter gather table is crucial to a HW device that can handle discontiguous DMA. The GPU has a MMU which allows the GPU to do page gathering and present a virtually contiguous buffer to the GPU HW. As a result it makes sense for the GPU driver to use some sort of scatter gather concept so maximize memory usage efficiency. To that end this patch keeps the notion of a scatter gather list but implements it in the nvgpu common code. It is based heavily on the Linux SGL concept. It is a singly linked list of blocks - each representing a chunk of memory. To map or use a DMA allocation SW must iterate over each block in the SGL. This patch implements the most basic level of support for this data structure. There are certainly easy optimizations that could be done to speed up the current implementation. However, this patches' goal is to simply divest the core MM code from any last Linux'isms. Speed and efficiency come next. Change-Id: Icf44641db22d87fa1d003debbd9f71b605258e42 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530867 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/common/pramin.c')
-rw-r--r--drivers/gpu/nvgpu/common/pramin.c27
1 files changed, 15 insertions, 12 deletions
diff --git a/drivers/gpu/nvgpu/common/pramin.c b/drivers/gpu/nvgpu/common/pramin.c
index 425bfdb4..bb7d930e 100644
--- a/drivers/gpu/nvgpu/common/pramin.c
+++ b/drivers/gpu/nvgpu/common/pramin.c
@@ -84,37 +84,40 @@ void nvgpu_pramin_access_batched(struct gk20a *g, struct nvgpu_mem *mem,
84 u32 offset, u32 size, pramin_access_batch_fn loop, u32 **arg) 84 u32 offset, u32 size, pramin_access_batch_fn loop, u32 **arg)
85{ 85{
86 struct nvgpu_page_alloc *alloc = NULL; 86 struct nvgpu_page_alloc *alloc = NULL;
87 struct page_alloc_chunk *chunk = NULL; 87 struct nvgpu_mem_sgl *sgl;
88 u32 byteoff, start_reg, until_end, n; 88 u32 byteoff, start_reg, until_end, n;
89 89
90 alloc = get_vidmem_page_alloc(mem->priv.sgt->sgl); 90 alloc = get_vidmem_page_alloc(mem->priv.sgt->sgl);
91 nvgpu_list_for_each_entry(chunk, &alloc->alloc_chunks, 91 sgl = alloc->sgl;
92 page_alloc_chunk, list_entry) { 92 while (sgl) {
93 if (offset >= chunk->length) 93 if (offset >= nvgpu_mem_sgl_length(sgl)) {
94 offset -= chunk->length; 94 offset -= nvgpu_mem_sgl_length(sgl);
95 else 95 sgl = sgl->next;
96 } else {
96 break; 97 break;
98 }
97 } 99 }
98 100
99 while (size) { 101 while (size) {
100 byteoff = g->ops.pramin.enter(g, mem, chunk, 102 u32 sgl_len = (u32)nvgpu_mem_sgl_length(sgl);
103
104 byteoff = g->ops.pramin.enter(g, mem, sgl,
101 offset / sizeof(u32)); 105 offset / sizeof(u32));
102 start_reg = g->ops.pramin.data032_r(byteoff / sizeof(u32)); 106 start_reg = g->ops.pramin.data032_r(byteoff / sizeof(u32));
103 until_end = SZ_1M - (byteoff & (SZ_1M - 1)); 107 until_end = SZ_1M - (byteoff & (SZ_1M - 1));
104 108
105 n = min3(size, until_end, (u32)(chunk->length - offset)); 109 n = min3(size, until_end, (u32)(sgl_len - offset));
106 110
107 loop(g, start_reg, n / sizeof(u32), arg); 111 loop(g, start_reg, n / sizeof(u32), arg);
108 112
109 /* read back to synchronize accesses */ 113 /* read back to synchronize accesses */
110 gk20a_readl(g, start_reg); 114 gk20a_readl(g, start_reg);
111 g->ops.pramin.exit(g, mem, chunk); 115 g->ops.pramin.exit(g, mem, sgl);
112 116
113 size -= n; 117 size -= n;
114 118
115 if (n == (chunk->length - offset)) { 119 if (n == (sgl_len - offset)) {
116 chunk = nvgpu_list_next_entry(chunk, page_alloc_chunk, 120 sgl = nvgpu_mem_sgl_next(sgl);
117 list_entry);
118 offset = 0; 121 offset = 0;
119 } else { 122 } else {
120 offset += n; 123 offset += n;