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authorDebarshi Dutta <ddutta@nvidia.com>2019-11-15 04:29:31 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2020-02-19 13:41:27 -0500
commite45e7b5cf87eaf94cf22e631c906170890233d8e (patch)
tree880fc3d736a3b8a0f595f097dd6f94ffbb0de9e9 /drivers/gpu/nvgpu/common/power_features
parent380e6b2c0c5e03f35aed68b836f64c907070e297 (diff)
gpu: nvgpu: move cg_enable after pmu_init is complete
This patch help resolve the boot time failures happening with pmu_exterr for porg. cg_enable can race with pmu_init thread, cg_enable is moved post pmu init thread to avoid the above race. Bug 200565050 Change-Id: I2192053eff8767847ea012ca20b3607d2f6cd26f Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2239959 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/common/power_features')
-rw-r--r--drivers/gpu/nvgpu/common/power_features/cg/cg.c30
1 files changed, 29 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/common/power_features/cg/cg.c b/drivers/gpu/nvgpu/common/power_features/cg/cg.c
index 39796bc8..a966c4c6 100644
--- a/drivers/gpu/nvgpu/common/power_features/cg/cg.c
+++ b/drivers/gpu/nvgpu/common/power_features/cg/cg.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -84,6 +84,34 @@ void nvgpu_cg_elcg_disable_no_wait(struct gk20a *g)
84 nvgpu_mutex_release(&g->cg_pg_lock); 84 nvgpu_mutex_release(&g->cg_pg_lock);
85} 85}
86 86
87void nvgpu_cg_blcg_disable_no_wait(struct gk20a *g) {
88 nvgpu_log_fn(g, " ");
89
90 if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
91 return;
92 }
93
94 nvgpu_mutex_acquire(&g->cg_pg_lock);
95 if (g->blcg_enabled) {
96 nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_RUN);
97 }
98 nvgpu_mutex_release(&g->cg_pg_lock);
99}
100
101void nvgpu_cg_blcg_enable_no_wait(struct gk20a *g) {
102 nvgpu_log_fn(g, " ");
103
104 if (!nvgpu_is_enabled(g, NVGPU_GPU_CAN_BLCG)) {
105 return;
106 }
107
108 nvgpu_mutex_acquire(&g->cg_pg_lock);
109 if (g->blcg_enabled) {
110 nvgpu_cg_set_mode(g, BLCG_MODE, BLCG_AUTO);
111 }
112 nvgpu_mutex_release(&g->cg_pg_lock);
113}
114
87void nvgpu_cg_elcg_enable(struct gk20a *g) 115void nvgpu_cg_elcg_enable(struct gk20a *g)
88{ 116{
89 nvgpu_log_fn(g, " "); 117 nvgpu_log_fn(g, " ");